24 of 24 Verilog Jobs in the East Midlands

planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC More ❯

planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC More ❯

to-day will involve: Translating customer needs into high-level firmware requirements using DOORS Developing architectural and detailed designs Writing HDL code (VHDL/Verilog) in Sigasi Studio Simulating your work using Mentor Graphics QuestaSIM Performing synthesis, place & route, and STA with Synplify (targeting Xilinx FPGAs) Creating automation scripts in More ❯

deliver customer requirements by: Developing high-level firmware requirements using DOORS Creating architectural designs Defining low level requirements and detailed designs Writing VHDL and Verilog HDL code using Sigasi Studio Simulating HDL designs at unit, integration and system level using Mentor Graphics QuestaSIM Undertaking synthesis, place and route and static More ❯

to build low-latency, high-throughput applications. Required skills and experience: FPGA design, development, and testing experience Proficiency in SystemVerilog, VHDL, and/or Verilog Programming skills in C/C++ or Python Experience with Quartus and/or Vivado Knowledge of low latency, machine learning, or neural network architectures More ❯

high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or More ❯

high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or More ❯

learning teams to create low-latency, high-throughput applications. Requirements: Experience in FPGA design, development, and testing Proficiency in SystemVerilog, VHDL, and/or Verilog Programming skills in C/C++ or Python Experience with Quartus and/or Vivado Knowledge of low-latency systems, machine learning, or neural network More ❯

At least 5 years of ASIC design AND verification experience. Expertise in processor design, on-chip communication, high-speed interfaces, or chiplets. Proficiency in Verilog/SystemVerilog and RTL design techniques. Experience with UVM for verification; FPGA or emulation experience is a plus. You will work onsite 3 days a More ❯

intent using customer’s flow · Trial synthesis and constraints updates, logical equivalency checking (LEC) Required Skills & Knowledge: · Micro-architecture design, RTL coding in System Verilog for either of below blocks: o Power management control o Subsystem/SOC clock control · Synthesis using Design Compiler/Fusion compiler · RTL/gate More ❯

quality - they're doing things properly here. You'll be: Capturing requirements in DOORS Designing firmware architectures and low-level specs Writing VHDL/Verilog in Sigasi Studio Running simulations in QuestaSIM Doing synthesis, place & route, and timing analysis (Synplify, Xilinx FPGAs) Automating workflows with Python Supporting CI/CD … What they're after: Solid background in FPGA and digital design Experience working on Real Time or safety-critical systems Strong with VHDL/Verilog and the usual toolsets Comfortable working solo or as part of a team Someone who can hit the ground running Clearance required You'll need More ❯

FPGA Engineer Location: Coventry Salary: £45,000-£50,000 We are excited to be supporting an established design consultancy who are looking to add an FPGA Engineer to their team. The role would offer the FPGA Engineer the opportunity to More ❯

show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯

show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases #J-18808-Ljbffr More ❯

verification. Must have expertise in some of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets. Expertise in Verilog/System Verilog for coding and verification. Proficiency in RTL design techniques. Experience in using UVM for functional verification of ASIC designs. Experience with FPGA More ❯

verification. Must have expertise in some of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets. Expertise in Verilog/System Verilog for coding and verification. Proficiency in RTL design techniques. Experience in using UVM for functional verification of ASIC designs. Experience with FPGA More ❯

verification. Must have expertise in some of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets. Expertise in Verilog/System Verilog for coding and verification. Proficiency in RTL design techniques. Experience in using UVM for functional verification of ASIC designs. Experience with FPGA More ❯

23 minutes ago Be among the first 25 applicants Our client is a reputable and long-standing design consultancy specialising in end-to-end systems development. From systems architecture to RTL design, they deliver fully verified solutions tailored to meet More ❯

FPGA Engineer - Hinckley - £50k Our client is a reputable and long-standing design consultancy specialising in end-to-end systems development. From systems architecture to RTL design, they deliver fully verified solutions tailored to meet their customers ASIC and FPGA More ❯