13 Verilog Jobs in the Thames Valley

FPGA and Optical Engineers. The Ideal Candidate Profile: Previous experience in research projects or industry experience in engineering. Proficiency in FPGA design (VHDL, System Verilog, Verilog). Strong knowledge of high-speed memory (such as DDR4, HBM, MIG). Serial interfaces (such as PCIe, 100GbE). Passion for technology, creativity more »

FPGA and Optical Engineers. The Ideal Candidate Profile: Previous experience in research projects or industry experience in engineering. Proficiency in FPGA design (VHDL, System Verilog, Verilog). Strong knowledge of high-speed memory (such as DDR4, HBM, MIG). Serial interfaces (such as PCIe, 100GbE). Passion for technology, creativity more »

taskwork. This is an opportunity to work to join a project development at the early stages. Skills required: Experienced in FPGA engineering VHDL or Verilog RTL Digital Design and High speed interfaces DSP Telecoms e.g. 4G, 5G or IoT connectivity Please contact Chris Oddy at KO2 Embedded Recruitment Solutions to more »

related discipline - Knowledge of 4G or 5G standards - A deep understanding of FPGA fabric and clocking resources is essential. - Proficiency in hardware programming languages (Verilog and/or VHDL) is essential - Experience with RTL-level design, simulation and verification is essential - Experience with design and implementation using Avalon and/ more »

and maintenance and design specification of documentation Skills and Experience Required: + Deep understanding of FPGA fundamentals, fabric, and clocking resources + Proficiency in Verilog/VHDL + Experience with RTL-level design + Experience with Avalon, AXI4 etc. Bonus: + Knowledge of 4G & 5G standards + Experience with scripting more »

voltage regulators, switches and operational amplifiers. Experience working on highly customised Power Management architecture definition is required including experience in; Cadence Composer, Cadence Virtuoso, Verilog-AMS, C. Experience in SOI processes is an advantage. You will be a strong team player who is willing to both teach and learn where more »

bonus, share options, 25 days holiday (plus stats), pension, life insurance, healthcare etc.. Senior FPGA Design Engineer with expertise in digital design using Verilog, Vivado, and ModelSim required by innovative, international 5G solutions provider. The Senior FPGA Engineer will play an important role as an individual contributor within an international … IC Design (FPGA/ASIC) expertise from architecture through to design and verification Strong skills in front end RTL design of Xilinx FPGAs using Verilog and Vivado Strong skills in simulation tools (eg. QuestaSim and/or ModelSim) Skills in hardware debugging Strong communication skills, able to work effectively as more »

related field. PhD (desirable) 12+ years of digital ASIC verification experience Practical experience and understanding of: Requirement capture, verification planning and coverage closure System Verilog and UVM test benches Creation of UVM test benches System Verilog assertions Managing regression and debugging failures Scripting languages (e.g. Perl/Python/TCL more »

related field. PhD (desirable) 12+ years of digital ASIC verification experience Practical experience and understanding of:Requirement capture, verification planning and coverage closure System Verilog and UVM test benches Creation of UVM test benches System Verilog assertions Managing regression and debugging failures Scripting languages (e.g. Perl/Python/TCL more »

Electronic Engineering or related field.PhD (desirable)12+ years of digital ASIC verification experiencePractical experience and understanding of:Requirement capture, verification planning and coverage closureSystem Verilog and UVM test benchesCreation of UVM test benchesSystem Verilog assertionsManaging regression and debugging failuresScripting languages (e.g. Perl/Python/TCL)As this is a more »

We’re partnered with a client developing applications within the telecommunications sector, delivering innovative solutions globally. They are looking to add a Senior FPGA Engineer to their design team who will report directly to the system architect. Known as a more »

Senior FPGA Engineer Location: Slough We have partnered with a client based in Slough, who is developing applications within the telecommunications sector, delivering innovative solutions globally. They are looking to add a Senior FPGA Engineer to their design team who more »

and analog products. The key skills needed for the Digital Design Engineer are: RTL design experience. Implementation of complex digital circuits and sub-systems. Verilog or System Verilog knowledge. An understanding of digital system-level design, including the use of standard bus protocols, bus architecture design and chip-level clock more »