Join a Growing ASIC Team Developing Next-Generation Silicon - Cambridge
I'm currently working with an innovative technology company that designs and develops its own silicon in-house. Following the successful delivery of multiple production ASICs, the team is continuing to expand as they develop the next generation of high-performance devices.
This is an excellent opportunity to join a collaborative ASIC team involved throughout the complete silicon development lifecycle—from architecture and specification through design, verification, implementation, manufacturing test and production.
As a DFT Engineer, you'll play a key role in developing robust Design-for-Test solutions for future ASICs, helping ensure high-quality silicon is delivered into volume production while balancing test coverage, implementation complexity and time-to-market.
You'll be responsible for defining, implementing and verifying DFT methodologies across complex SoC and IP designs, working closely with Design, Verification, Physical Implementation and Product Engineering teams.
Responsibilities
Define DFT strategies at chip, subsystem and IP level
Implement structural and functional DFT methodologies across complex ASIC designs
Insert and integrate scan,
MBIST
, EDT, SSN and IJTAG-based test infrastructure
Verify DFT implementation and debug related issues throughout the design cycle
Support implementation and sign-off, including timing constraints, timing closure, power analysis and formal equivalence checking
Work closely with Physical Design and Verification teams to ensure successful integration
Support ATPG generation, silicon bring-up and manufacturing test
Mentor and support other engineers within the team
What they're looking for
Experience working within modern ASIC or SoC development flows
Strong experience with Siemens Tessent DFT tools
Good understanding of complex DFT challenges, including clocking, reset architecture and IP integration
Experience with:
ATPG
MBIST
Scan architecture
DFT verification and simulation debug
UPF and low-power verification concepts
Good Tcl scripting skills (Python is also beneficial)
Collaborative approach with excellent troubleshooting and debugging skills
Desirable Experience
Knowledge of advanced silicon technologies and manufacturing fault models
Familiarity with IJTAG / IEEE 1687 and related test access standards
Experience supporting vector translation and production bring-up on ATE platforms
Previous experience mentoring or coaching other engineers
About You
You'll enjoy solving technically challenging problems, working across multiple engineering disciplines and taking ownership of high-quality DFT implementation from architecture through to production.
You're someone who enjoys collaborating with experienced engineers, sharing knowledge, and contributing to the successful delivery of complex silicon products.
If you'd be interested in hearing more, I'd be happy to share further details confidentially. - Please contact Rachel Mason at IC Resources