Formal Verification Engineer (Grad-Senior)

Avanti Recruitment have partnered with a specialist Formal Verification company in the London area, who provide specialist consulting to big names in the semiconductor world.

The company are set to go through a major growth phase and are looking for Formal Verification Engineers at all levels to join their specialist team. You can be a graduate with a strong Maths/Electronics/Physics background, or an engineer bringing Formal Verification knowledge from industry. For experienced engineers, you ll have the opportunity to immediately lead projects.

To be successful in this role you ll need:

• A BSc/MSc/PhD in EEE/Maths/Physics
• Fluency in at least one of VHDL/Verilog/Systemverilog
• Ideally a Linux/Unix background

It would be great if you also had:

• Knowledge of RISC-V/Arm/x86
• Experience in ML or AI
• An understanding at least one of Python/Tcl/Bash

On offer are competitive salary packages, as well as dedicated Formal Verification training from industry experts you ll also have the opportunity to travel to worldwide verification conferences.