Senior Firmware Engineer

Must Have

• Considerable experience designing Firmware architecture using FPGA technologies and tools from either Xilinx, Intel (Altera) or Microsemi (Actel). Experience of fast interfaces such as PCIe, Ethernet, JESDC is also required. Able to use advanced verification techniques such as VHDL or System Verilog / UVM. Familiarity with Model Based Engineering using Matlab and Simulink tools is also an advantage Analysis of system level requirements to derive detailed Firmware requirements. A methodical approach to the full firmware design lifecycle, working to a structured firmware process such as RTCA DO-254 or similar.

Security Clearance

You must be eligible for full security clearance. For more information and guidance please visit: https://government/publications/united-kingdom-security-vetting-clearance-levels

Key Responsibility Areas

Our Electronics Function in Edinburgh requires a Senior/Principal Firmware (FPGA) Engineer to create and develop firmware for leading edge airborne applications. You would be responsible for the design and development of Firmware designs using VHDL, for verifying designs using either VHDL or SystemVerilog and working to a structured firmware design process.

Skills, Qualifications & Knowledge Required

This role requires you to hold a degree in Electronics and Electrical Engineering, ideally specialising in FPGA / Digital techniques.

As a Senior/Principal Firmware Engineer, you will have experience of:

Creating innovative VHDL based FPGA designs

Advanced verification techniques using either VHDL or SystemVerilog / UVM

Current FPGA technologies from either Xilinx, Altera or Microsemi and their tools

Model Driven Engineering tools including MATLAB and Simulink

High Speed Interface Design & Integration, including PCIe, DDR3, Ethernet

Analysing system level documents and deriving detailed Firmware requirements

Adopting a methodical approach to the full firmware design lifecycle, ideally working to a structured firmware process such as RTCA DO-254 or similar

Specifying complex timing and area constraints for efficient FPGA place and route

De-bugging firmware designs and supporting system related verification and integration

Effective and flexible communication