Design Engineer

Job Title: Senior Verification Engineer – High-Speed Networking

Job Description:

We are looking for a Senior Verification Engineer to verify high-speed connectivity IP using UVM and advanced verification methodologies. The role involves building robust verification environments, integrating protocol VIPs, and driving coverage closure for complex networking interfaces.

Key Responsibilities:

• Develop and execute UVM-based verification for high-speed networking IP
• Apply constrained-random verification and functional coverage techniques
• Integrate and configure VIPs for networking and interconnect protocols
• Drive coverage closure and support IP/subsystem integration
• Automate verification flows using Python and CI/CD workflows

Required Skills & Experience:

• Strong expertise in UVM and constrained-random verification
• Hands-on experience with 100Gb Ethernet, PCIe Gen5, and AMBA/AXI
• Proficiency in Python scripting and CI/CD environments
• Solid Git version-control skills

Preferred Qualifications:

• Familiarity with Vivado/Vitis tools