Engineering Manager (FPGA, C++)

Engineering Manager (FPGA, C++) *candidates require an active SC clearance to start) Start: ASAP Duration: 6 months (rolling) Location: Gloucestershire Rate: £600-650 /day (inside IR35) We are looking for an experienced Engineering Manager to join a high-profile engineering programme, leading the delivery of complex software and hardware products within a secure environment. This is an excellent opportun...

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