Analog Design Engineer

Job Title: Analogue Design Engineer

location: Farnborough

Contract: 8 Months

Job Overview - Dept Description and Job Duties:

The senior engineer will take on the design of multiple analogue blocks including LDOs, temperature sensors, central biasing, test bus and process monitors. The tasks will include:

Review of block specifications and architecture selection.

Schematic design, simulation and reporting compliance to specifications.

Overseeing a layout engineer to complete the layout.

Post-layout parasitic simulation and necessary adjustments.

Documentation of usage and any calibrations etc.

Liaising with the chip lead to integrate the designs.

Presentation of design for block-level reviews.

Key Responsibilities:

• Acts as a key contributor in a complex environment.
• Responsible for the delivering the fully verified blocks.
• Solves complex problems in a tightly constrained environment.
• Fully competent in Analogue design for complex sub-cells and small subsystems.
• Keeps abreast of new developments and is technical expert in the design of analogue sub-cells.
• Ensures quality of the solution; works with macro lead to ensure timely delivery of subsystems.

Minimum Qualifications:

Bachelor's degree in Science, Engineering, or related field

Minimum Experience:

Candidate should have:

• 5+ year of work experience.
• Design experience of Key Power management IPs like SMPS, LDOs.
• Good understanding of the analogue design.
• Experience with either Cadence or Mentor Analogue design tools.
• Ability to coordinate with different team members and define the requirements.
• Experience in a relatively low geometry node (=40nm) CMOS process.

Preferred Experience:

• Fully competent in Analogue design and verification techniques.
• Fully competent in the use of Cadence analogue design and verification tools.
• Recent LDO, Bias, Temperature sensor, process monitor design experience.
• Good team player.
• Good interpersonal and communication skills.