4 of 4 Contract SystemVerilog Jobs

Principal Firmware Engineer

Hiring Organisation
Advanced Resource Managers Limited
Location
Luton, Bedfordshire, England, United Kingdom
Employment Type
Contractor
Contract Rate
£75.00 - £85.00 per hour
Principal Firmware Engineer Based in Luton 12-month contract Paying up to £85p/h (Inside IR35) Please note - Due to the nature of the work, you'll be required to already hold or be ...

Principal Firmware Engineer

Hiring Organisation
ARM
Location
Luton, Bedfordshire, United Kingdom
Employment Type
Contract
Contract Rate
GBP Annual
Principal Firmware Engineer Luton 12-month contract Paying up to 85p/h (Inside IR35) Please Note - Due to the nature of the work you ll be required to be eligible to obtain a high ...

Principal Firmware Engineer Level 6

Hiring Organisation
Morson Edge
Location
Luton, Bedfordshire, South East, United Kingdom
Employment Type
Contract
Contract Rate
£62.20 - 84.81 per hour + None
Design, develop and verify FPGA firmware for complex digital systems. Derive firmware requirements and architectures from system-level requirements. Develop RTL using Verilog/SystemVerilog and verify designs using UVM. Work with FPGA toolchains including Xilinx and Intel (Altera) devices. Develop high-speed interface solutions (e.g. PCIe, Ethernet, JESD). … testing and documentation throughout the development lifecycle. Essential Skills & Experience Strong FPGA development experience across major FPGA families. Proficiency with Xilinx tools, TCL, Verilog, SystemVerilog and UVM. Experience with Xilinx 7 Series, UltraScale, Intel (Altera) or Microsemi FPGA architectures. Knowledge of high-speed interfaces such as PCIe, Ethernet and JESD. ...

SC Cleated FPGA Engineer

Hiring Organisation
Experis
Location
London, United Kingdom
Employment Type
Contract
Contract Rate
£550 - £650/day
doing: Design, implement and verify custom FPGA IP modules, DSP pipelines and high-speed communications interfaces using VHDL or Verilog/SystemVerilog in AMD/Xilinx Vivado Lead SoC hardware/software co-design by configuring and integrating the Processing System (PS) and Programmable Logic (PL) on Zynq UltraScale+ devices … with Vivado Design Suite, IP Integrator and simulation workflows (e.g., ModelSim, Questa or Vivado Simulator) Solid HDL capability across VHDL, Verilog and/or SystemVerilog Demonstrable experience with Yocto (BitBake, recipe creation, layer management) or PetaLinux for building custom Linux distributions Strong C/C++ skills for Linux kernel-space ...