2 of 2 Permanent SystemVerilog Jobs in Bishop's Stortford

techniques, including clock gating, while producing robust RTL code. Candidate profile Degree in Electrical/Electronic Engineering (MEng preferred) or equivalent Strong experience in SystemVerilog RTL design and verification across the full design and synthesis flow. Familiarity with synchronous and asynchronous design, and low-power techniques. Proficiency with Cadence ...

closely related field Minimum of 4 years of relevant industry experience Special Requirements Universal Verification Methodology TCL and Bash scripting Formal verification techniques SystemVerilog Salary and benefits £50,000 – £60,000 per annum base salary, dependent on experience and skill set Bonus and/or equity participation available Industry-standard ...