2 of 2 Permanent Design for Test Jobs in Bristol

DFT Technical Lead - Digital & SoC Design (CDI) Location: Paris, Caen, or Remote in France Salary: Up to €110,000 Gross per annum + company benefits Join an innovative global semiconductor specialist in high-performance mixed-signal and digital ASICs. They focus on delivering custom system-on-chip (SoC) and transceiver solutions to clients in communications and industrial sectors … leading in advanced technology nodes and silicon-proven design excellence. As a DFT (Design for Test) Technical Leader , you will oversee the design and implementation of DFT architecture for complex SoCs developed in advanced CMOS nodes. You will collaborate with RTL design, physical implementation, and industrialization teams … to ensure efficient testability and high production yield. You will drive test strategies, implement best-in-class DFT flows, and contribute to delivering state-of-the-art transceiver ASICs for various markets. Your responsibilities: Define and drive DFT architecture and implementation for complex SoCs in advanced (sub-20nm) CMOS technologies. Develop and maintain DFT insertion More ❯

of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. Working with project management and leads on planning tasks … in one or more of various verification methodologies - UVM/OVM, formal, power aware verification, emulation Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support Good Problem Solving and Debugging skills. "Nice To Have" Skills and Experience … Knowledge of SoC Verification Flow and strategy. Experience with ARM-based designs and/or ARM System Architectures. Porting peripheral driver software Clock Domain Crossing verification Experienced in GLS, DFT/DFD, Power Aware verification techniques Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet More ❯