5 of 5 Permanent Verilog Jobs in Bristol

Key responsibilities Development of Wi-Fi products, including microcontrollers and connectivity SoC/IP subsystem verification planning, test infrastructure development, functional verification. Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal. Embedded C code or writing CPU-centric tests using C code Coverage definition, implementation and analysis Key Qualifications MSc in electrical engineering or equivalent or Bachelor More ❯

techniques that are employed to ensure high-quality, innovative designs. Required Skills and Experience: Demonstration of a strong delivery record of sophisticated micro-architecture and RTL design using System Verilog, Verilog or VHDL in reasonable timescales. Be able to navigate and make high-level design trade-offs and articulate the rationale for those choices. Knowledgeable on ASIC (or FPGA) design More ❯

compile our tools for both macOS (arm64) and Linux (x86, arm64) and we also create RISC-V binaries that will run on our bespoke hardware. Cocotb, Verilator, and Icarus Verilog are used to build and simulate the RTL. SystemC, Docker, QEMU and Linux buildroot are used for simulation. Our compiler is built using MLIR. Everything mentioned here is configured, built More ❯

devices Proficiency in one or more of the following areas: Microcontroller-based system design and programming ADC/DAC integration and signal processing FPGA design and development (e.g., VHDL, Verilog) Experience designing low-noise, high-precision analogue circuits Familiarity with RF circuit design Use of CAD tools for PCB and system-level design Experience developing scalable and robust control architectures More ❯

and don't miss this opportunity to join Infineon's success story. As a Senior Staff Verification Engineer, you will play a critical role in developing and maintaining System Verilog - UVM test benches, solving complex problems, and develop new SV UVM verification components. Your responsibilities will also include understanding and modifying Specman-e test benches, debugging failing test cases, and … enhancing the verification strategy and architecture of IP testbenches, ensuring test bench quality, and meeting sign-off targets. In your new role, you will: Be responsible for developing System Verilog - UVM testbench and solve potentially complex problems related to test bench development Be responsible and lead developing of new SV UVM verification components Be able to understand and modify Specman … have: A Bachelor's degree in Electrical/Electronic Engineering or equivalent degree At least 5 years of experience working in Verification, preferably at the IP level, with System Verilog - UVM; Prior knowledge in Specman-e is desirable Advanced knowledge in UVM and SVAs, System Verilog Experience with Verification platform and framework development Proven experience of ownership of IP verification More ❯