years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯
years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯
Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯
Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯
performance. Modularize the overall FPGA architecture to enhance configurability. Skills and experience required: Proven experience in FPGA design and development. Proficiency in VHDL/Verilog and FPGA toolchains. Strong understanding of digital communication protocols Experience with hardware-software integration and testing. Bonus: Experience with EDVT/board bring-up test More ❯
performance. Modularize the overall FPGA architecture to enhance configurability. Skills and experience required: Proven experience in FPGA design and development. Proficiency in VHDL/Verilog and FPGA toolchains. Strong understanding of digital communication protocols Experience with hardware-software integration and testing. Bonus: Experience with EDVT/board bring-up test More ❯
Required Skills & Knowledge: Micro-architecture design RTL coding in System Verilog for aviation project Synthesis using Design Compiler/Fusion compiler 5 years SDC development LEC failure debugs RTL/gate level debug experience using tools such as Verdi More ❯
Required Skills & Knowledge: Micro-architecture design RTL coding in System Verilog for aviation project Synthesis using Design Compiler/Fusion compiler 5 years SDC development LEC failure debugs RTL/gate level debug experience using tools such as Verdi More ❯
show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯
show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯
Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System VerilogMore ❯
Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System VerilogMore ❯
milton keynes, south east england, United Kingdom Hybrid / WFH Options
Athsai
Mandatory Domain IP/SOC Verification “ Key Words “ SOC Verification, IP verification, Test development, Test Simulation Technical/Soft Skills IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Desired Skills Technical/Soft Skills Communication (spoken & written) Good Customer Handling Good Onsite and Offshore Coordination Analytical More ❯
high wycombe, south east england, United Kingdom Hybrid / WFH Options
Athsai
Mandatory Domain IP/SOC Verification “ Key Words “ SOC Verification, IP verification, Test development, Test Simulation Technical/Soft Skills IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Desired Skills Technical/Soft Skills Communication (spoken & written) Good Customer Handling Good Onsite and Offshore Coordination Analytical More ❯
Role - RTL Design/LeadLocation:EU/Remote Mandatory Skill: SoC Integrtion, IP integration RTL design & Coding RTL lint, RTL CDC Verilog/System Verilog Industry Experience : 5 to 10 years SoC Design engineer with experience working on SOCs based on ARM Architecture Should be familiar with AMBA based bus More ❯
Role - RTL Design/LeadLocation:EU/Remote Mandatory Skill: SoC Integrtion, IP integration RTL design & Coding RTL lint, RTL CDC Verilog/System Verilog Industry Experience : 5 to 10 years SoC Design engineer with experience working on SOCs based on ARM Architecture Should be familiar with AMBA based bus More ❯