1 of 1 Permanent Load Balancing Jobs in Cambridge

Kernel Engineer

Hiring Organisation
Microtech Global Ltd
Location
Cambridge, Cambridgeshire, East Anglia, United Kingdom
Employment Type
Permanent
MGLRU, memory compaction and defragmentation, transparent huge pages, page-fault and TLB-shootdown paths, copy-on-write behaviour Drive scheduler performance: run-queue and load-balancing behaviour, energy-aware scheduling, wakeup latency, task placement on heterogeneous (big.LITTLE/DynamIQ) topologies, cpufreq/cpuidle governor interaction Optimize synchronization primitives … internals: physical/virtual memory management, buddy and slab allocation, reclaim, compaction, page tables, TLB management Deep scheduler knowledge: CFS/EEVDF internals, load balancing, preemption, real-time classes, energy-aware scheduling Mastery of kernel synchronization: locking primitives, RCU, lock-free techniques, the ARM64 memory model and barrier ...