Huawei Technologies Research & Development (UK) Ltd
bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯
bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯
bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯
bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯
deliver high-performance solutions that meet client needs. Your profile: 5+ years of relevant experience Proficient in CPU instruction set architectures (e.g., Arm, RISC-V) Strong understanding of general-purpose CPU micro-architecture, including pipelining, out-of-order execution, and caches Expertise in data analysis and software development More ❯
bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯
deliver high-performance solutions that meet client needs. Your profile: 5+ years of relevant experience Proficient in CPU instruction set architectures (e.g., Arm, RISC-V) Strong understanding of general-purpose CPU micro-architecture, including pipelining, out-of-order execution, and caches Expertise in data analysis and software development More ❯
Design-for-Debug (DFD) logic and issues Experience in clocking, reset, power-up sequences and power management Experience with x86, ARM Architecture (ISA), RISC-V, or PowerPC architecture Comfort with scripting such as Perl, Shell and TCL Benefits offered are described: AMD benefits at a glance . AMD More ❯
Altera Stratix 7 or Stratix 10) Experience with ASIC environments ( Proven professional experience in at least one of the following areas: Customisation of RISC-V CPUs e.g. addition of new instructions and associated hardware accelerators; Implementation of modern classical decoders on FPGA/ASIC e.g. LDPC, turbo-codes More ❯
Kingdom time type Full time posted on Posted 7 Days Ago job requisition id R-100181 About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest … across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits. At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and … out our website and Glassdoor pages. Job Description: Principal System and Software Architect The Role: Do you want to be part of the RISC-V revolution? RISC-V and SiFive are redefining computing platforms for the 21st century. As a System and Software Architect, you'll More ❯
CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯
CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯
CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯
CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯
CPU Architect - Assembly/C++/Python/ARM/RISC-V We're currently on the lookout for a CPU Architect for a global technology giant in Cambridge. A true leader in research, development, and innovation, this global technology powerhouse invests heavily into R&D to make … fantastic referral scheme which I would be happy to discuss. Keywords: Consumer Electronics/CPU/Architecture/Micro-Architecture/Assembly/RISC-V/ARM/Instruction Sets #consumerelectronics #cpu #architecture By applying to this role you understand that we may collect your personal data and More ❯
CPU Architect - Assembly/C++/Python/ARM/RISC-V We're currently on the lookout for a CPU Architect for a global technology giant in Cambridge. A true leader in research, development, and innovation, this global technology powerhouse invests heavily into R&D to make … fantastic referral scheme which I would be happy to discuss. Keywords: Consumer Electronics/CPU/Architecture/Micro-Architecture/Assembly/RISC-V/ARM/Instruction Sets #consumerelectronics #cpu #architecture By applying to this role you understand that we may collect your personal data and More ❯
CPU Architect - Assembly/C++/Python/ARM/RISC-V We're currently on the lookout for a CPU Architect for a global technology giant in Cambridge. A true leader in research, development, and innovation, this global technology powerhouse invests heavily into R&D to make … fantastic referral scheme which I would be happy to discuss. Keywords: Consumer Electronics/CPU/Architecture/Micro-Architecture/Assembly/RISC-V/ARM/Instruction Sets #consumerelectronics #cpu #architecture By applying to this role you understand that we may collect your personal data and More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Codasip
unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL , and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including … motivated self-starters who enjoy working on something revolutionary in an innovative company. To be responsible for the microarchitecture definition and implementation of RISC-V processors and extensions Processor development within the Codasip Architectural Language (CodAL) Undertaking design synthesis and results analysis to ensure PPA targets can be More ❯
believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient RISC-V CPU cores from scratch to power some of the most exciting applications - think high performance supercomputers and next-generation embedded systems. By also … impact. Join us in Cambridge or Bristol and be part of a team redefining what's possible in CPU design. You will: Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Collaborate with other engineers in a … Experience with guiding, mentoring or coaching engineers Good knowledge of computer systems and architecture What we'd love you to have Knowledge of RISC-V Architecture Experience with formal verification or other more advanced verification techniques What's in it for you? Join a flexible, open and supportive More ❯
will be within our Codasip Labs organization, where we work on cutting-edge technologies and prepare them for rapid commercialization. You will analyse RISC-V processor designs at the architectural and microarchitectural levels to determine security vulnerabilities, characterize the potential risk level and suggest and evaluate practical mitigations … A flexible and adaptable attitude to work A desire to learn and also positively influence technical direction What you might have: Experience with RISC-V processors Previous experience working with academia Experience with formal security verification Knowledge of advanced security countermeasures such as CHERI What's in it … a future of innovation together! We can't wait to see what you'll achieve at Codasip. Some useful Links on Codasip: Codasip RISCV Processor Solutions Design for differentiation: architecture licenses in RISCV Scaling is Failing - Dr. Ron Black, CEO, Codasip Codasip Labs to More ❯
believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient RISC-V CPU cores from scratch to power some of the most exciting applications - think high performance supercomputers and next-generation embedded systems. By also … a future of innovation together! We can't wait to see what you'll achieve at Codasip. Some useful Links on Codasip: Codasip RISCV Processor Solutions Design for differentiation: architecture licenses in RISCV Scaling is Failing - Dr. Ron Black, CEO, Codasip Codasip Labs to More ❯