Senior CPU VerificationEngineer European Tech Recruit are working closely with a leading semicon company, based in Cambridge, who are looking for a talented Senior CPU VerificationEngineer to join their team . Responsibilities as Senior CPU VerificationEngineer: Development/ownership of varied … aspects of unit verification environments including testbench components, tests/stimulus, checkers and functional coverage. Involvement in end-to-end verification processes, from test plan creation through to verification closure. Investigation of test failures and debug of sometimes complex technical issues that can cross team boundaries. Work … with project leads and team members to plan, prioritize, track, and coordinate tasks to meet quality goals at the planned time. Contribute to verification improvement activities across the CPU group and the wider verification community. Requirements: Experience of simulation based verification of RTL designs. Familiarity with constrained More ❯
Senior CPU VerificationEngineer European Tech Recruit are working closely with a leading semicon company, based in Cambridge, who are looking for a talented Senior CPU VerificationEngineer to join their team . Responsibilities as Senior CPU VerificationEngineer: Development/ownership of varied … aspects of unit verification environments including testbench components, tests/stimulus, checkers and functional coverage. Involvement in end-to-end verification processes, from test plan creation through to verification closure. Investigation of test failures and debug of sometimes complex technical issues that can cross team boundaries. Work … with project leads and team members to plan, prioritize, track, and coordinate tasks to meet quality goals at the planned time. Contribute to verification improvement activities across the CPU group and the wider verification community. Requirements: Experience of simulation based verification of RTL designs. Familiarity with constrained More ❯
VerificationEngineer - Cambridge (can do remote within the UK) Senior and Principal Verification Engineers I am seeking highly skilled and detail-oriented Verification Engineers to join a dynamic start-up, who have gone through successful funding rounds, have live projects with well known clients and growing … Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. (PLUS) Proven experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. … Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments. On offer is the chance to join an early stage start-up with a founder who has already had More ❯
VerificationEngineer - Cambridge (can do remote within the UK) Senior and Principal Verification Engineers I am seeking highly skilled and detail-oriented Verification Engineers to join a dynamic start-up, who have gone through successful funding rounds, have live projects with well known clients and growing … Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. (PLUS) Proven experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. … Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments. On offer is the chance to join an early stage start-up with a founder who has already had More ❯
VerificationEngineer - Cambridge (can do remote within the UK) Senior and Principal Verification Engineers I am seeking highly skilled and detail-oriented Verification Engineers to join a dynamic start-up, who have gone through successful funding rounds, have live projects with well known clients and growing … Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. (PLUS) Proven experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. … Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments. On offer is the chance to join an early stage start-up with a founder who has already had More ❯
Add to Favourites: Design VerificationEngineer Do your life's best work here - with the whole world watching. Join a rapidly growing team at our UK GPU design centre. At Apple, new ideas and complex challenges quickly become phenomenal products, services, and customer experiences. The Design VerificationEngineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores. This includes a deep understanding of the micro-architectural details of their block and how it functions within the broader GPU design. A strong computer architecture background, preferably in … graphics, and a solid foundation in verification methodology will be essential to achieve high-confidence testing coverage. Description Use SystemVerilog, UVM, and C++ with industry-leading simulation tools and methodologies to verify complex GPU designs. Develop verification plans in coordination with design leads and architects. Create and maintain More ❯
in areas such as machine learning, biometrics and video processing, combined with world class software and silicon development. Overview Synaptics is looking for a VerificationEngineer who will be part of SoC Verification team. Your primary focus will be working on IP and SoC Verification. This position … Verification. Job Duties Develop SystemVerilog-UVM testbenches and resolve complex test bench challenges Define and implement a functional coverage model to ensure complete design verification Ensure the design verification meets sign-off targets, including coverage and test bench qualification Develop a deep understanding of complex SoCs and IPs … and take end-to-end ownership of their verification Contribute to improving the verification strategy and architecture of SoC testbenches Strong proficiency in SystemVerilog and UVM Understanding of industry-standard protocols such as USB, AMBA and I3C Proficiency in scripting languages including Python, Perl, or Tcl Proficiency in More ❯
VerificationEngineer - Cambridge (can do remote within the UK) Senior and Principal Verification Engineers I am seeking highly skilled and detail-oriented Verification Engineers to join a dynamic start-up, who have gone through successful funding rounds, have live projects with well known clients and growing … Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. (PLUS) Proven experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. … Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments. On offer is the chance to join an early stage start-up with a founder who has already had More ❯
and embedded software engineers to produce a fully verified, trusted and performant solution. With full visibility of the entire stack, you will own everything verification related. As a Senior VerificationEngineer at Riverlane, you will: Proactively work with designers and architects to define verification plans based … Implement scalable testbenches, including checkers, reference models and coverage groups in SystemVerilog. You will implement self-testing, directed and random tests. Maintain the design verification environment, keeping track of regression, coverage metrics and bugs. You do not need a background in quantum computing! You will learn this along the … way Requirements What we need Demonstrable commercial experience in functional verification, including ownership of verification planning and strategy. A proactive and collaborative person who actively shares feedback and who can independently define the scope of work. Proven experience of testbench design with verification frameworks like UVM/ More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
Are you passionate about digital hardware verification? This is a fantastic opportunity to move into Machine Learning and Artificial Intelligence, key technologies for the future of computing. Working on the cutting edge of Arm IP, you will help craft technology that powers the next generation of mobile apps, portable … available, suitable for candidates with a range of experience levels. Responsibilities: Joining our growing and versatile team, you'll contribute to the development and verification of groundbreaking ML and Neural Network hardware. Collaborating with experts across global design centers, you'll drive impactful projects and help deliver Arm's … next-generation IP using the most sophisticated tools and methodologies. As a verificationengineer, you will make a difference by influencing the verification strategy and methodology, taking ownership of complex work packages and driving them to success. Required Skills and Experience: Meticulous attention to detail, ensuring high More ❯
CPU VerificationEngineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for … the Advanced Vector Extensions(AVX), the Scalable Vector Extension(SVE), Scalable Matrix Extension(SME), Confidential Compute Architecture(CCA), Morello/CHERI. Keywords: CPU/Verification/Arm Architecture/C/C++/MIPS/Micro-Architecture/Assembly/AVX/SVE/SME/CCA/Hardware More ❯
CPU VerificationEngineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for … the Advanced Vector Extensions(AVX), the Scalable Vector Extension(SVE), Scalable Matrix Extension(SME), Confidential Compute Architecture(CCA), Morello/CHERI. Keywords: CPU/Verification/Arm Architecture/C/C++/MIPS/Micro-Architecture/Assembly/AVX/SVE/SME/CCA/Hardware More ❯
CPU VerificationEngineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for … the Advanced Vector Extensions(AVX), the Scalable Vector Extension(SVE), Scalable Matrix Extension(SME), Confidential Compute Architecture(CCA), Morello/CHERI. Keywords: CPU/Verification/Arm Architecture/C/C++/MIPS/Micro-Architecture/Assembly/AVX/SVE/SME/CCA/Hardware More ❯
CPU VerificationEngineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for … the Advanced Vector Extensions(AVX), the Scalable Vector Extension(SVE), Scalable Matrix Extension(SME), Confidential Compute Architecture(CCA), Morello/CHERI. Keywords: CPU/Verification/Arm Architecture/C/C++/MIPS/Micro-Architecture/Assembly/AVX/SVE/SME/CCA/Hardware More ❯
solve global challenges, striving for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance GPU Formal Datapath VerificationEngineer (Bristol/Cambridge) The Role: Join the Radeon Graphics Central Formal Verification Group to verify datapath hardware modules and develop cutting … formal methodologies. The Person: The ideal candidate will be highly accurate, detail-oriented, and possess strong communication and problem-solving skills. Key Responsibilities: Create verification plans. Develop C++ models of ALU datapath components. Perform formal proof of ALU datapath components. Research and develop new formal methodologies and tool flows. More ❯
advantage by empowering their system-on-chip developers to build the most innovative products. What you'll do We're looking for passionate Principal Verification Engineers to help bring our vision to life. You'll be a key part of verifying complex, state-of-the-art CPUs, including advanced … out-of-order processors. Taking ownership of portions of the design, you'll apply a range of verification methodologies and play a vital role in setting high standards for a brand-new platform. This is a unique chance to work on clean-sheet designs that push technological boundaries and … or Bristol and be part of a team redefining what's possible in CPU design. You will: Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Collaborate with other engineers in a team, being responsible for the delivery More ❯
offer end-to-end solutions for leading-edge low-power mixed-signal SOCs from feasibility study through to system architecture, digital and analogue design, verification and validation, implementation and layout production, and characterisation. Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field. About the role: DV Engineer: Design Verification of custom V&M and IoT IP and SoCs, including: Ability to analyze HW design spec and develop verification test plan/strategy Test bench and infrastructure development using System Verilog and UVM IP level test development using System Verilog and UVM IP level test More ❯
