2 of 2 Permanent Verification Engineer Jobs in Cambridge

DV Engineer Quantum StartUp I am seeking a Senior Verification Engineer to join a rapidly growing HW Team in Cambridge. You will get the opportunity to work on cutting edge technology and in the area of quantum computing. No prior experience in quantum computing? No problem. You'll learn as you go while working alongside world-class … engineers in a truly cross-disciplinary environment. About the role As a Senior Verification Engineer , you’ll take full ownership of functional verification across their hardware systems. You’ll collaborate with a talented team of hardware designers and embedded software engineers to deliver trusted, high-performance solutions—verified from the ground up. With full visibility of the … stack, you’ll define verification strategies, implement robust test environments, and ensure confidence in every design you deliver. What you’ll do Work closely with hardware designers and system architects to define and own verification plans based on design specifications Develop scalable SystemVerilog testbenches , including checkers, coverage groups, and reference models Design and run self-checking, directed, and More ❯

Position Overview As a Senior Design Verification Engineer , you will apply industrial-strength verification to both system and block-level designs, including RISC-V cores, OTBN (cryptographic CPU), AES accelerators, and peripherals like USB, I2C, and SPI. Key Responsibilities Design, implement, and debug block/system-level tests and testbenches using SystemVerilog and UVM Develop test and … new and updated designs Triage and debug nightly regressions Review contributions to open-source projects Enhance test and CI infrastructure Collaborate on academic/industry publications Stay current with verification best practices and introduce improvements Candidate Requirements Essential: 5+ years industry experience in design verification Strong SystemVerilog and UVM expertise Experience across the full verification cycle (planning … equivalent Desirable: Experience with multiple hardware block types Knowledge of security countermeasures (fault injection, side-channel attacks) Experience with RISC-V ISA or other instruction sets Familiarity with formal verification tools (e.g., JasperGold) Benefits 25 days annual leave + 8 bank holidays Employer pension contribution Private medical insurance, income protection, critical illness and life cover Opportunities to attend industry More ❯