1 to 25 of 27 Permanent SystemVerilog Jobs in Cambridgeshire

CD.) Willing to learn new development languages, tools, frameworks and techniques. "Nice To Have" Skills and Experience: Experience in hardware functional verification (Verilog, VHDL, SystemVerilog, systemC. Using Synopsys, Cadence or Siemens tools). Knowledge of more programming languages like C, Go, JavaScript, Ruby, Perl, Tcl. Experience with Docker (images creation More ❯

DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and spoken, in English. Who we are More ❯

subject FPGA or ASIC architecture, design and verification, including: System engineering and partition IP Design, Packaging and Integration Xilinx Vivado or Altera Quartus Verilog, SystemVerilog Timing Closure Self-checking/Automated Testbenches integrated into CI Electronic design experience including high-speed design and high-level layout Technical leadership experience Knowledge More ❯

might also have experience of one or more of the following: Build systems (e.g. Bazel, Nextflow, FuseSoC) Hardware EDA tools (eg. simulation, linting, synthesis) Systemverilog, C/C++, Simulator DPI/VPI Containerization (eg. Docker) Distributed Compute, Orchestration Jenkins Automation Software templating, rendering Data Engineering/Data Science/Machine More ❯

through to the implementation and verification of these systems. Key Requirements Extensive experience working across the entire FPGA design cycle Strong command of VHDL, SystemVerilog and Xilinx design tools Solid understanding of the design of high-speed digital circuits for real-time systems and experience implementing signal processing algorithms with More ❯

through to the implementation and verification of these systems. Key Requirements Extensive experience working across the entire FPGA design cycle Strong command of VHDL, SystemVerilog and Xilinx design tools Solid understanding of the design of high-speed digital circuits for real-time systems and experience implementing signal processing algorithms with More ❯

or FPU architecture and debug/test strategies. Experience with physical implementation tools (P&R) and place-and-route flows. Programming/scripting in SystemVerilog, SystemC, C/C++, Python, Perl, or TCL. This is a chance to work on next-generation silicon that powers tomorrow’s technology! For more More ❯

CSI/DSI Experience of interconnect standards ACE, AXI, AHB, and APB Ability to form requirements and specify architectural features Expert-level Verilog/SystemVerilog for design and verification Familiarity with scripting languages (Bash, Python, Tcl, etc) The following would also be useful: Experience of Cadence simulation tool flow Experience More ❯

of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning More ❯

of verifying CPU architectures or other complex IP (e.g. GPUs, NNAs) Fluency and the ability to write clear and concise code in languages like SystemVerilog, Python, C++, Rust, or Go Past verification ownership of multiple design blocks Analytical thinking, self-sufficiency and strong team collaboration skills Ability to work effectively More ❯

feedback and who can independently define the scope of work. Proven experience of testbench design with verification frameworks like UVM/OVM. Knowledge of SystemVerilog assertion (SVA). Exposure to different programming languages, such as C, C++ and Python. You have formal verification experience. What you can expect from us More ❯

in block-level verification using UVM or similar methodologies. Strong knowledge of coverage driven verification for complex designs. Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches. Skilled in planning verification tasks and producing realistic effort and time estimates. Additional Qualities That Will Help Your Application Stand More ❯

computer architecture background, preferably in graphics, and a solid foundation in verification methodology will be essential to achieve high-confidence testing coverage. Description Use SystemVerilog, UVM, and C++ with industry-leading simulation tools and methodologies to verify complex GPU designs. Develop verification plans in coordination with design leads and architects. More ❯

Ability to lead technical discussions across architecture, firmware, software, and validation teams. "Nice To Have" Skills and Experience : Familiarity with RTL design, UVM/SystemVerilog, or hardware verification flows. Experience with trusted execution environments (TEEs) and secure monitor implementation. Understanding of secure firmware update mechanisms (rollback protection, anti-cloning). More ❯

Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm invents breakthrough technologies that transform how the world computes, connects, and communicates. Today, our inventions are the foundation for life-changing products, experiences, and More ❯

Your primary focus will be working on IP and SoC Verification. This position reports to the Sr. Manager, Digital Design Verification. Job Duties Develop SystemVerilog-UVM testbenches and resolve complex test bench challenges Define and implement a functional coverage model to ensure complete design verification Ensure the design verification meets … IPs and take end-to-end ownership of their verification Contribute to improving the verification strategy and architecture of SoC testbenches Strong proficiency in SystemVerilog and UVM Understanding of industry-standard protocols such as USB, AMBA and I3C Proficiency in scripting languages including Python, Perl, or Tcl Proficiency in C More ❯

We are excited to be supporting an established SME working on Radar Systems for a variety of security and surveillance activities. They are currently looking to add an FPGA Engineer to their design team to push forward their latest product More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm invents breakthrough technologies that transform how the world computes, connects, and communicates. Today, our inventions are the foundation for life-changing products, experiences, and More ❯

experienced ASIC Design Engineer is sought to join a dynamic team. You will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯

with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions More ❯

with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions More ❯

Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage More ❯

Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage More ❯

Role: Director of Engineering Location: Cambridge/Hybrid Salary: Up to £250,000 + Bonus DOE Are you ready to lead cutting-edge engineering teams in the fast-paced world of financial technology? Our client, a leading global technology firm More ❯