7 of 7 DemandTrendPermanent SystemVerilog Jobs in Cambridgeshire

and machine learning experts to help build low-latency/high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or More ❯

be the right fit. FPGA Engineer requirements: Minimum 3+ years commercial FPGA Engineering (Implementation, simulation, verification and test) Excellent academic background with degree from a top university Coding in SystemVerilog or VHDL FPGA external interface designs (e.g. PCIe, Aurora, Ethernet, SPI etc.) Some exposure to digital signal processing Proactive, collaborative mindset with ownership of projects This is a rare chance More ❯

ensure end-to-end performance and compliance. Support test and lab evaluation using signal generators, spectrum analysers, and oscilloscopes. Lead or contribute to the implementation of designs using VHDL, SystemVerilog, and MATLAB/Simulink HDL Coder. Develop low-level C software for FPGA bring-up, test, and integration. Use industry-standard tools such as Vivado, Quartus, and ModelSim for simulation … reviews, solution development, and internal consultation across teams. Essential Experience Proven track record in delivering FPGA designs for real-time, high-speed, or RF-centric systems. Proficiency in VHDL, SystemVerilog, and embedded C for FPGA-host integration, control, and testing. Experience with MATLAB/Simulink and HDL Coder for algorithm-to-hardware workflows. Proven ability to develop and deploy on More ❯

D esign Verification engineer Responsibilities: Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards Collaborate with software teams to define and implement configurable test benches Work with design teams test plans, failure debug, coverage, etc. … in Electrical Engineering, Computer Engineering or Computer Science 8-12 years and current hands-on experience in block-level/IP-level/SoC-level verification Proficiency in Verilog, SystemVerilog Familiarity with industry-standard EDA tools for simulation and debug Deep experience with UVM-based test benches Experience with modern programming languages like Python Knowledge of Arm AMBA protocols such More ❯

D esign Verification engineer Responsibilities: Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards Collaborate with software teams to define and implement configurable test benches Work with design teams test plans, failure debug, coverage, etc. … in Electrical Engineering, Computer Engineering or Computer Science 8-12 years and current hands-on experience in block-level/IP-level/SoC-level verification Proficiency in Verilog, SystemVerilog Familiarity with industry-standard EDA tools for simulation and debug Deep experience with UVM-based test benches Experience with modern programming languages like Python Knowledge of Arm AMBA protocols such More ❯

Microarchitect & RTL Design Engineer Cambridge,/Bristol England, United Kingdom We are a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era. We focus on software-driven, unified More ❯

Microarchitect & RTL Design Engineer Cambridge,/Bristol England, United Kingdom We are a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era. We focus on software-driven, unified More ❯