3 of 3 Permanent Design Engineer Jobs in County Antrim

LMR (Land, Mobile, Radio) Technical Design Engineer

Hiring Organisation
EOS IT Company
Location
Lisburn, Co. Antrim, UK
Employment Type
Full-time
services through global simplicity with trusted transparency. This role provides deep technical expertise in LMR (Land, Mobile & Radio) security systems, specialising in RF design, system configuration, complex troubleshooting, and optimisation. You will be responsible for the technical integrity and performance of LMR solutions from design to deployment. … System Design & Architecture Validate and update designs and BOM based on data provided following site-walk GRID Mapping surveys. Provide deep technical expertise in LMR systems, including technologies such as analog, digital (e.g., P25, DMR, TETRA), and trunked systems. Develop and maintain standardised DAS system design and processes. ...

Senior IP Design Engineer

Hiring Organisation
Infoplus Technologies UK Ltd
Location
Belfast, UK
Employment Type
Full-time
Description:Role: Senior IP Design EngineerType: ContractLocation: Belfast, UK HybridJob details:Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements.Key Skills:SystemVerilog RTL design100Gb Ethernet, PCIe Gen5, AMBA/AXIDeep understanding xxuwjjq of FPGA/… Adaptive SoC design flow including Make sure to read the full description below, and please apply immediately if you are confident you meet all the requirements. ...

Senior IP Design Engineer

Hiring Organisation
Infoplus Technologies UK Ltd
Location
Finaghy, Belfast, UK
Employment Type
Full-time
Description: Role: Senior IP Design EngineerType: ContractLocation: Belfast, UK Hybrid Job details:Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements. Key Skills:SystemVerilog RTL design100Gb Ethernet, PCIe Gen5, AMBA/AXIDeep understanding of FPGA …/Adaptive SoC design flow including P&R and timing closureVivado/Vitis expertisePython/Tcl scriptingGit & CI/CD experience JBRP1_UKTJ ...