Permanent Senior FPGA Engineer Jobs in East Anglia

2 of 2 Permanent Senior FPGA Engineer Jobs in East Anglia

Senior FPGa Engineer

Cambridge, Cambridgeshire, East Anglia, United Kingdom
Platform Recruitment Limited
Senior FPGA Engineer - Cambridge - Hybrid Were supporting a high-growth technology company at the forefront of AI acceleration. They are seeking a Senior Digital Design Engineer to join their FPGA team and contribute to cutting-edge solutions powering AI inference in modern data centres. As a … FPGA Engineer you will: Design and implement high-performance FPGA solutions in SystemVerilog. Build reusable, parameterisable IP components for multiple FPGA platforms. Achieve timing closure, carry out floorplanning, and debug designs on hardware. Integrate FPGA IP with software runtime/compiler stacks. Contribute to coding standards, verification strategies, and Agile development practices. Work … closely with software and ML engineers to deliver efficient, scalable inference applications. Were looking for someone with: 5+ years experience writing well-documented SystemVerilog/Verilog/VHDL. Strong FPGA toolchain knowledge (Quartus, Vivado, or equivalent). Experience in debugging, bring-up, and timing optimisation of FPGA designs. Exposure to C/C++ or Python for integration. Familiarity More ❯
Employment Type: Permanent
Salary: £80,000
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Senior FPGA Engineer

cambridge, east anglia, united kingdom
IC Resources
pioneering technology company in Cambridge that’s building cutting-edge control infrastructure for distributed, ultra-low latency systems. As they scale their platform, they’re now seeking a Principal FPGA Engineer to take a key role in developing high-performance digital control and networking subsystems on advanced Xilinx platforms. This is a senior …/25G networking, real-time packet processing, and precision timing—supporting a wider mission that combines hardware, software, and optical systems in a truly novel way. Key responsibilities: Lead FPGA development for timing-critical control systems on Zynq and Ultrascale platforms Design and implement low-latency packet processing pipelines and digital interfaces Support system-level integration, debug, and performance … SystemVerilog/VHDL) with a focus on performance and timing closure Hands-on with Vivado, Xilinx SoCs, and high-speed interface protocols (AXI, PCIe, SPI, I2C) Strong background in FPGA-based networking or hardware acceleration Proficient in Python for scripting, modelling, or tooling Comfortable working in a lab with oscilloscopes, logic analysers, and debuggers This is a high-impact More ❯
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