1 to 25 of 32 Permanent SystemVerilog Jobs in the East of England

that are degree qualified (or equivalent) with significant experience in FPGA development. Competent VHDL Language and Design Skills. Competent Verification Skills using VHDL and SystemVerilog methodologies A deep proven level of experience designing for Xilinx, Intel or Microsemi FPGAs Experience of professionally configuring and documenting designs Experience of working ...

development processes Required Skills & Experience Strong experience with FPGA technologies (e.g. Xilinx, Microsemi/Actel, or Lattice) Advanced verification using VHDL and/or SystemVerilog/UVM Expertise in timing constraints and FPGA optimisation Ability to derive detailed xehkeey firmware requirements from system-level specifications Experience across the full firmware ...

following background: Strong experience with modern FPGA platforms (e.g. AMD/Xilinx or Intel/Altera devices) RTL coding experience in VHDL, Verilog, or SystemVerilog Background in building or optimising large, complex FPGA or ASIC systems Experience with high-performance, low-latency or deeply pipelined architectures Proven ability to test ...

equivalent industry experience). 6+ years' experience in RTL design. Academic or commercial experience in CPU RTL design. Strong RTL design skills using Verilog, SystemVerilog, or VHDL. A solid software engineering background, including experience with: Object-oriented and functional programming paradigms – C,C++,Python Compiler infrastructures, particularly domain-specific languages ...

tools/process Strong background in the C++ language, preferably on Linux with exposure to Windows platform Good understanding and hands-on experience with SystemVerilog language Scripting language experience: Perl, Ruby, Makefile, shell preferred. Exposure to leadership or mentorship is an asset Desirable assets with prior exposure to memory subsystem ...

FPGA Team Lead with the following background: Proven experience leading and developing FPGA/digital design teams Expert RTL development using Verilog or SystemVerilog Strong experience across FPGA and ASIC design High-throughput DSP or signal-processing architectures Synthesis, timing analysis and hardware resource optimisation Experience delivering complex IP through ...

solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard.You'll have:Programming experience, especially with SystemVerilog, VHDL, C(++), Python, Tcl or shell.The ability to imagine and implement improvements to a whole range of processes.The ability to communicate complex technical information ...

Job Description: Salary Range: £45k - £61k Leonardo UK operates a grade-based salary framework with broad bands. The salary range shown reflects the approved grade band for this role, or a narrower hiring range published ...

complex SoC developmentExperience in static design checks, including CDC, RDC, X-prop, Lint and UPF static checksExperience creating design specificationsExperience with Verilog/SystemVerilog and verification methodologiesStrong delivery record of sophisticated RTL subsystems in reasonable timescalesAbility to navigate and make high-level analysis driven PPA trade-offs along with driving ...

looking for an FPGA Engineer with the following background: Proven experience in FPGA or ASIC design and verification RTL coding in Verilog or SystemVerilog Familiarity with Vivado or Quartus and timing closure Understanding of system-level design and high-speed electronics Strong academic background in Engineering, Physics, or a related ...

record delivering complex FPGA systems from concept through to production Strong experience with RTL design, simulation, synthesis and timing analysis, including VHDL, Verilog or SystemVerilog Strong knowledge of high-speed interfaces, DSP, control logic, image processing and hardware-software co-design Excellent technical leadership, communication and stakeholder management skills, with ...

architectures Integration of operating system-class subsystems alongside real-time domains A strong appreciation of the practical realities of chip implementation, including RTL design (SystemVerilog), verification methodologies (UVM, formal, emulation/FPGA), DFT, timing closure, power analysis, and physical design constraints. Familiarity with scripting languages such as Bash, Python ...

functional verification, including ownership of verification planning and strategy. Proven experience of testbench design with verification frameworks like UVM/OVM. Knowledge of SystemVerilog assertion (SVA). Exposure to different programming languages, such as C, C++ and Python. A proactive person who can independently define the scope of work. ...

languages for data processing and presentation - along the lines of Python, JavaScript, HTML, SQL, MatLabExperience with RTL design in an HDL such as Verilog, SystemVerilog or VHDLExperience with low power design techniques - clock and power gating, voltage/frequency scaling, retentionUnderstanding of power delivery and experience of static and dynamic ...

Are you an experienced FPGA Designer who enjoys contributing to the development of complex FPGA platforms? Look no further! Join our ambitious team at MBDA and be part of a company that is at the ...

improve development efficiency through new tools, methodologies and emerging technologies Required experience: Strong commercial experience in RTL design using Verilog and/or SystemVerilog Previous line management or people management experience within an engineering environment Experience leading technical projects and coordinating engineers towards successful delivery Experience working with industry standard ...

successful in this role you will also need experience of toolchains such as Vivado or Quartus and a HDL language such as VHDL or SystemVerilog, and experience in running simulations and testbenches and performing hardware-level debugging.The company are offering tailored packages for the right engineer, which includes a performance ...

innovate and achieve the best possible outcome to the highest imaginable standard.You'll have:Experience in developing and maintaining verification components.Strong proficiency in SystemVerilog, UVM, and constrained-random verification methodologies.Skilled in debugging and identifying root causes of issues.Effective communication of technical issues, both verbally and in writing.You might also have ...

constrained-random verification methodology and reusable componentsExpertise in root-cause analysis of complex issues, with the ability to resolve them efficientlyExcellent knowledge of SystemVerilog and UVMStrong technical leadership skills with experience in mentoring junior engineersAbility to collaborate and drive ideas for wider adoptionYou might also have:GPU/CPU/ ...

troubleshooting simulation/emulation mismatches and test failures.Hands-on experience with emulation platforms such as ZeBu, Palladium, or Strato.Familiarity with RTL languages such as SystemVerilog/VerilogExperience in collaboration with EDA vendors to introduce new capabilities, resolve tool issues, and contribute to future tool improvements.Skilled in planning system test tasks ...

Join us at Entrust At Entrust, we’re shaping the future of identity centric security solutions. From our comprehensive portfolio of solutions to our flexible, global workplace, we empower careers, foster collaboration, and build solutions ...

methodologies, high-quality deliverables and successful project outcomes. Key Responsibilities Develop and execute verification strategies for complex ASIC and FPGA designs. Create and maintain SystemVerilog/UVM verification environments, testbenches and coverage models. Debug RTL and verification issues, ensuring designs meet quality and performance requirements. Collaborate with design, FPGA … reviews. Essential Skills & Experience Degree in Electronic Engineering, Computer Engineering or a related discipline. Proven experience verifying ASIC and/or FPGA designs. Strong SystemVerilog and UVM expertise. Good understanding of RTL design and digital hardware development. Experience with coverage-driven and assertion-based verification techniques. Linux proficiency and scripting ...

methodologies, high-quality deliverables and successful project outcomes. Key Responsibilities Develop and execute verification strategies for complex ASIC and FPGA designs. Create and maintain SystemVerilog/UVM verification environments, testbenches and coverage models. Debug RTL and verification issues, ensuring designs meet quality and performance requirements. Collaborate with design, FPGA … reviews. Essential Skills & Experience Degree in Electronic Engineering, Computer Engineering or a related discipline. Proven experience verifying ASIC and/or FPGA designs. Strong SystemVerilog and UVM expertise. Good understanding of RTL design and digital hardware development. Experience with coverage-driven and assertion-based verification techniques. Linux proficiency and scripting ...

engineering team, contributing to the core FPGA technology that powers a range of next-generation products. Responsibilities Design and develop reusable FPGA modules using SystemVerilog for deployment across multiple products. Perform RTL verification and support timing closure through constraints, analysis, and design optimisation. Write module specifications, review code and documentation … maintain high engineering standards. Collaborate with hardware, software, and mechanical engineers to deliver new products to market. Essential Experience Strong SystemVerilog FPGA design experience. RTL verification skills and familiarity with Python. Experience writing timing constraints and achieving timing closure. Desirable Experience Experience with cocotb for FPGA verification. Familiarity with Linux ...

About SiFiveAs the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications ...