13 of 13 Permanent SystemVerilog Jobs in the East of England

software and infrastructure teams to optimise full-stack performance. Requirements: 7+ years FPGA/RTL design experience in timing-critical systems. Strong background in SystemVerilog, synthesis, timing closure and verification. Hands-on with Vivado/Quartus or equivalent toolchains. Familiarity with AXI, PCIe, Ethernet or custom high-speed interfaces. Bonus ...

designs and testbenches Key skills Experience with FPGA technologies (Xilinx, Microsemi/Actel, or Lattice) and associated toolchains Advanced verification techniques using VHDL or SystemVerilog/UVM Ability to define and manage timing and area constraints for FPGA implementation Experience translating system-level requirements into detailed firmware requirements Structured firmware ...

adjust designs to ensure timing closure - Bring value with experience in Python based verification frameworks, such as cocotb (highly advantageous) Requirements: - Strong knowledge of SystemVerilog - Experience with Python - Proven background in RTL verification - Ability to write and validate timing constraints - Understanding of low power design principles - Experience writing module specifications ...

techniques, including clock gating, while producing robust RTL code. Candidate profile Degree in Electrical/Electronic Engineering (MEng preferred) or equivalent Strong experience in SystemVerilog RTL design and verification across the full design and synthesis flow. Familiarity with synchronous and asynchronous design, and low-power techniques. Proficiency with Cadence ...

closely related field Minimum of 4 years of relevant industry experience Special Requirements Universal Verification Methodology TCL and Bash scripting Formal verification techniques SystemVerilog Salary and benefits £50,000 – £60,000 per annum base salary, dependent on experience and skill set Bonus and/or equity participation available Industry-standard ...

Waveform viewers, and Formal Proof Tools. Familiarity with Formal Verification, Assertions, and Silicon bring-up. Keywords: CPU Verification/Design Verification/DV/SystemVerilog/UVM/Cache Coherence/Branch Prediction/Formal Verification/RIS/SOC/Assembly/Cambridge/Silicon Bring ...

Software Engineer includes: PhD in Mathematics, Physics or similar A-Levels in Mathematics, Physics or similar graded A* - B Proficiency in C++ or SystemVerilog If you are a PhD graduate looking for an exciting Software Engineer opportunity to work at the intersection of software, hardware, and research within a world ...

generous salary on offer. This award-winning Technology company seeks a well qualified FPGA Engineer with SoC design and Integration skills, RTL Verification experience (SystemVerilog, VHDL) and Python knowledge. In this role the successful FPGA Design Engineer will write timing constraints and where necessary modify designs to close timing; working … Electronic Engineering related discipline. Proven commercial FPGA Design experience. SoC design and Integration experience. Python knowledge ideally with exposure to cocotb. RTL Verification experience (SystemVerilog, VHDL). Writing timing constraints and ensuring these are met. Design for low power. To find out more, please apply in confidence now. You must ...

create test plans for highly configurable IPs meant to provide interconnectivity between components across an SOC, chiplet or multi chiplet systems Write UVM/SystemVerilog code to implement the test plan, checkers and scoreboards Collaborate with software teams to define and implement configurable testbenches Work with design and DV engineers … Engineering or Computer Science 8+ years and current hands-on experience in block-level/IP-level/SOC-level verification Proficiency in Verilog, SystemVerilog Familiarity with industry-standard EDA tools for simulation and debug Deep experience with UVM-based testbenches Experience with modern programming languages like Python Knowledge ...

Job Title: Microarchitect & RTL Design Engineer Location: Cambridge, England, United Kingdom About the Role: We are seeking a seasoned Microarchitect and RTL Design Engineer with a strong background in microarchitecture and RTL coding. The ideal ...

Take the initiative in developing reusable RTL for implementing clever algorithms For this role, we are seeking an academically bright candidate, PhD-qualified in a numerate stem subject such as physics, maths, electronics, or electronics ...

source silicon Collaborate with global industry-leading partners Real opportunity to shape verification strategy and grow with the team What you will be doing SystemVerilog/UVM-based verification (block & SoC level) Verification of CPU, GPU, and complex SoC subsystems Debugging regressions and reviewing open-source contributions Driving coverage closure … successful tapeouts and full verification lifecycles What they are looking for Experience in digital design verification (Mid to Lead level depending on seniority) Strong SystemVerilog/UVM expertise Experience in CPU and/or GPU verification Strong C/Python scripting and Git/GitHub workflow experience Exposure to full ...

NoC Architect Baya Systems , Greater Cambridge, UK -or- elsewhere in the UK hybrid/remote Job Title: NoC Architect About the role: We are seeking a NoC Architect with prior research experience in Networks-on ...