1 to 25 of 55 Permanent ASIC Jobs in England

with colleagues in the verification teams, modelling teams, software driver developers, multimedia architects and imaging researchers. Mentor & support other members of the team Required skills and experience: Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to More ❯

with colleagues in the verification teams, modelling teams, software driver developers, multimedia architects and imaging researchers. Mentor & support other members of the team Required skills and experience: Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to More ❯

issues. As a Staff engineer, you will also guide and support team members and contribute to improving design methodologies. Required Skills and Experience: Experience in RTL design for complex ASIC products & SoCs using Verilog and/or SystemVerilog Experience with Arm-based designs and/or Arm System Architectures Knowledge of Functional Safety concepts and standards (e.g., ISO 26262, IEC More ❯

development environments Ability to interpret and influence system-level design decisions Desirable Qualifications: Degree in Electrical Engineering, Computer Engineering, or related discipline (advanced degrees preferred) Experience with FPGA/ASIC development or hardware/software co-design Background in wireless, satellite, or secure communications Familiarity with tools such as GNU Radio, Xilinx Vivado, or Texas Instruments DSP SDKs Whats on More ❯

You will also identify areas for improvement in processes and methodologies, then implement those changes to advance our best-practises for hardware design. Required Skills and Experience : Experience of ASIC RTL design, preferably for ISP, processor design (CPU or GPU) or related IP (interconnect, memory controllers, high-performance peripherals) Experience of Verilog, System Verilog or VHDL Exposure to all stages More ❯

of this team, your role will involve building an understanding of incoming Arm IP RTL & SoC designs and making the relevant design changes to implement a prototype of this ASIC RTL on FPGA. This includes RTL integration, design, modifications, simulation/verification and validation on hardware of FPGA specific IPs and peripherals into the larger SoC prototype. You'll … against a plan and have a strong focus on engineering efficiency and quality . Responsibilities: Development and verification of subsystems, peripherals, and IPs used for FPGA prototyping purposes. Modifying ASIC RTL from sophisticated systems to target a dedicated FPGA prototyping platform. Debugging of test failures and issues by working in collaboration with the design teams and FPGA users. Required Skills … scripting languages. "Nice To Have" Skills and Experience: Exposure to the FPGA design flow from RTL design, simulation, synthesis , place & route, constraints, and timing closure. Demonstrate an understanding of ASIC/SoC prototyping in FPGA. Programming languages such as: assembly language (ideally Arm assembler), higher-level (e.g. C), object-orientated (e.g. C++). Use of a UNIX environment and shell More ❯

DSP flow experience for FPGA Comfortable attacking new and unfamiliar problems Interest in trading Things we would like to see but are not essential: Python, TCL Low latency design ASIC Network and packet processing Financial market data Trading systems Software development What We Offer Competitive compensation Group Pension plan Annual discretionary bonus Fully catered breakfast, lunch and snacks. 25 days More ❯

via satellite, using advanced FPGAs and space-qualified ASICs. As an FPGA Engineer, you will: Translate complex signal processing algorithms into efficient RTL architectures Design and verify FPGA and ASIC IP using Verilog/SystemVerilog Validate and integrate designs on the latest FPGA development platforms Collaborate across architecture, verification, and physical implementation teams Contribute to UVM test environments and technical More ❯

DSP flow experience for FPGA Comfortable attacking new and unfamiliar problems Interest in trading Things we would like to see but are not essential: Python, TCL Low latency design ASIC Network and packet processing Trading systems WHAT WE OFFER Competitive compensation Annual discretionary bonus Fully catered breakfast, lunch and snacks. 25 days annual leave Informal dress code Private healthcare and More ❯

O.S., Tuning, kernel bypass technologies, core dump analysis) Network (R&S, cut-through, Multicast, SDN, BGP, L1-L3, PCAP analysis) HW (Server, FPGA, GPU, DPU, Memory, over clocking, cooling, ASIC, Quantum, NUMA) DevOps (OpenShift, Kubernetes, DevOps, Programming C Python/Rust , CI/CD) Time Sync (PTP, NTP, GPS, White Rabbit, SyncE) Wave (RF, Millimeter, Microwave, DWDM, Photonics) Storage (I More ❯

O.S., Tuning, kernel bypass technologies, core dump analysis) Network (R&S, cut-through, Multicast, SDN, BGP, L1-L3, PCAP analysis) HW (Server, FPGA, GPU, DPU, Memory, over clocking, cooling, ASIC, Quantum, NUMA) DevOps (OpenShift, Kubernetes, DevOps, Programming [C Python/Rust], CI/CD) Time Sync (PTP, NTP, GPS, White Rabbit, SyncE) Wave (RF, Millimeter, Microwave, DWDM, Photonics) Storage (I More ❯

system commissioning Support manufacturing and test teams during build and validation phases Essential Skills & Experience: Digital Circuit Design: Expertise in logic gates, flip-flops, and state machines FPGA & ASIC Development: Experience in designing and implementing FPGAs and ASICs HDL Proficiency: Strong knowledge of VHDL and/or Verilog Embedded Systems: Familiarity with microprocessor and microcontroller architectures Mixed-Signal Design More ❯

design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL.Familiar with ASIC design flow and tools (e.g., lint, synthesis, simulation). Strong debugging and problem-solving skills. Desired Requirements:Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces More ❯

design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL.Familiar with ASIC design flow and tools (e.g., lint, synthesis, simulation). Strong debugging and problem-solving skills. Desired Requirements: Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces More ❯

in: Education: MSc or BSc (or equivalent) in Electronics or Computer Engineering with significant experience in digital design & functional verification. A strong understanding of design and verification concepts in ASIC & FPGA flows. You will have proven expertise in some of the following areas: Experience with simulation and debug tools, with understanding of how to configure & optimize tools for maximum efficiency. More ❯

a collaborative and transparent culture, where you can share your ideas and feedback with everyone. Position : Formal Verification Engineer Location : Cambridge Salary : £30-70k + benefits Key Skills : ASIC/FPGA verification, Verilog, VHDL, RTL More ❯

functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability. Key Responsibilities: Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off. Work on synthesis, timing analysis (STA), and optimisation to achieve the best PPA metrics. Perform power More ❯

functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability. Key Responsibilities: Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off. Work on synthesis, timing analysis (STA), and optimisation to achieve the best PPA metrics. Perform power More ❯

INSIDE OF IR35 CONTRACT - Physical Design Engineer Contract Length: 6 Months (possibility for extension) Rate: £600 - £800 per day Location: Cambridgeshire Working Env: Hybrid (2 days on-site) This is an opportunity to join one of the most prestigious names More ❯

people management experience Our projects generally fit in the following technical areas, experience in any of the following technical domains is advantageous: Commercial, optimised, multiplatform software/FPGA/ASIC development (specifically of our codecs) Mobile and desktop application development Cloud based transcoding platforms Video or data compression knowledge/experience. Project management qualification such as PRICNE2, PMP, APM More ❯

people management experience Our projects generally fit in the following technical areas, experience in any of the following technical domains is advantageous: Commercial, optimised, multiplatform software/FPGA/ASIC development (specifically of our codecs) Mobile and desktop application development Cloud based transcoding platforms Video or data compression knowledge/experience. Project management qualification such as PRICNE2, PMP, APM More ❯

area. Your background: Expertise in DFT for complex digital and SoC designs. Strong understanding of RTL design and DFT integration. Experience with ATPG, BIST, ECC, redundancy techniques, and advanced ASIC test methods. In-depth knowledge of JTAG, Boundary Scan, and Memory Testing. Note: 5V Tech acts as an Employment Agency for this vacancy. We offer a reward scheme if you More ❯

development from concept through to silicon validation. Produce detailed design documentation and mentor junior engineers. Collaborate with test and layout teams across multiple sites. Contribute to the definition of ASIC test plans and support product evaluation and characterisation. Skills & Experience Required: Master's degree or PhD in Electronic Engineering, Microelectronics, or a closely related field, or equivalent industrial track record. More ❯

development from concept through to silicon validation. Produce detailed design documentation and mentor junior engineers. Collaborate with test and layout teams across multiple sites. Contribute to the definition of ASIC test plans and support product evaluation and characterisation. Skills & Experience Required: Master's degree or PhD in Electronic Engineering, Microelectronics, or a closely related field, or equivalent industrial track record. More ❯

development from concept through to silicon validation. Produce detailed design documentation and mentor junior engineers. Collaborate with test and layout teams across multiple sites. Contribute to the definition of ASIC test plans and support product evaluation and characterisation. Skills & Experience Required: Master's degree or PhD in Electronic Engineering, Microelectronics, or a closely related field, or equivalent industrial track record. More ❯