24 of 24 Permanent ASIC Jobs in England

user terminals. Experience in aviation, maritime, land mobility, defense, or enterprise satellite communications. Familiarity with terminal certification and regulatory environments. Experience with modem chipset, ASIC, FPGA, DSP, or advanced digital communications development. Master's degree or PhD in Electrical Engineering, Telecommunications Engineering, Computer Engineering, or a related discipline. Ability ...

review technical documentation, including specifications, schematics, and hardware test plans. Perform functional simulation, synthesis and static timing analysis targeting FPGA and/or ASIC technologies. Collaborate with firmware, software, and systems engineers to ensure successful hardware/software integration. Support hardware verification, validation, laboratory bring-up and board-level debugging. ...

Bonus Points Expertise in: CUDA kernel development, Triton/Pallas/CuTe DSLs, PyTorch/JAX internals, XLA optimization, or hardware acceleration (FPGA/ASIC) Knowledge of reinforcement learning, post-training, or fine-tuning techniques Knowledge of financial markets or trading Benefits Discretionary bonus eligibility Medical, dental, and vision insurance ...

/functional safety experience a strong advantage Desirable Battery chemistry knowledge (Li-ion, LFP), industrial IoT/cloud-connected systems, FPGA/ASIC design, automotive/aerospace power systems, and wireless integration (Bluetooth/WiFi/4G/5G). What They Offer £65,000-£75,000, flexible/hybrid ...

related field. Nice to have Experience with dataflow or non-GPU accelerator architectures; pre/post-silicon bring-up on custom hardware (ASIC/FPGA); production observability at scale (hardware counters, Prometheus/Grafana-style export, device and cluster views). Adjacent depth is welcome: HPC cluster design, high-speed ...

especially in CUDA/Triton/Pallas/CuTe DSL kernel development, lower‐level PyTorch/JAX/XLA development, CUDA Graphs, FPGA/ASIC experience. At least two years of work experience building deep learning systems in any domain (robotics, biology, chemistry, physics, audio, video, recommendations, etc.). Experience ...

analysis and handling all the different quality metrics to signoff the verification. Minimum Qualifications Learn about FPGA prototyping Define and Design automation techniques for ASIC to FPGA synthesis Perform case study analysis Experiment the new approach on the project execution flow Preferred Qualifications Qualified Master's graduate ...

teams and programming languages to find root causes of deep and complex issues Experience of the verification process applied in CPU and/or ASIC environments System Verilog, Python, C++, Linux UVM SVA LLVM, GCC SGE or other DRMS XML and XPath/XSLT In addition to a competitive salary ...

potential solutions and drive execution. Minimum Qualifications BSc/MSEE/M Eng/BEng or equivalent is required Exposure in any aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place & Route and all aspects of timing, electrical and physical signoff. Preferred Qualifications Experience with ...

team where your ideas directly influence cutting-edge digital hardware solutions and where you’ll gain hands-on experience across the complete FPGA and ASIC development lifecycle. This is an excellent opportunity for engineers looking to accelerate their technical growth, work on challenging projects, and collaborate with experienced industry professionals ...

test, ATPG debug and yield optimisation Provide technical leadership and mentor other DFT engineers What they're looking for Around 10+ years' experience in ASIC/SoC Design-for-Test Proven ownership of DFT architecture on at least one complex tape‐out Strong expertise in: Scan architecture Scan compression ATPG ...

IC Resources is seeking an engineering leader to contribute to architectural direction and hands-on RTL development for AI accelerators. You will work across the full silicon lifecycle, transforming architectural concepts into production-ready hardware ...

functional engineering environment. Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with relevant experience in ASIC, CPU, or physical design implementation. Master’s degree with relevant hardware engineering experience, or a PhD with relevant CPU/ASIC/physical implementation experience. … Preferred Qualifications Physical design experience on CPU cores, high‐performance compute blocks, or timing‐critical ASIC designs. Experience working in advanced semiconductor process nodes, especially 7nm and below. Strong understanding of CPU PPA optimization and design convergence. Experience with low‐power design techniques, clock optimization, useful skew, standard‐cell library ...

coverage. Working as part of a highly skilled engineering team, you'll be involved in the design and implementation of high-performance FPGA and ASIC solutions, taking products from architecture through to validation on the latest space-qualified hardware platforms. Key responsibilities include: Translating system and algorithm requirements into … micro-architectures Designing and implementing RTL using Verilog/SystemVerilog for FPGA and ASIC targets Creating testbenches and supporting functional verification Deploying and validating designs on FPGA development platforms Optimising designs for performance, timing, power, and resource utilisation Producing high-quality technical documentation Collaborating across architecture, verification, physical implementation ...

used by millions of developers, educators, engineers, and hobbyists worldwide. The company focuses on accessible, high-performance computing and is expanding its in-house ASIC capability to support an exciting product roadmap. This role suits someone who works autonomously within a collaborative team and enjoys ownership. The leadership team … working culture are strong. The Opportunity As part of a growing ASIC team, you will contribute to the development of next-generation silicon products. Working within a small, highly collaborative group, you will gain exposure across the complete silicon development lifecycle, from architecture and specification through design, verification, implementation, test ...

experience with RTL design at IP or SoC level using SystemVerilog Proven ability to optimise designs across performance, power, and area constraints Experience with ASIC or FPGA design tools and environments Exposure to formal verification or proof methodologies to capture and validate design intent Knowledge ...

document micro-architectures, interfaces and design specifications Support integration into complex SoC environments Qualifications Strong RTL design experience using Verilog or SystemVerilog Experience delivering ASIC designs through to silicon Exposure to FPGA development and prototyping Experience implementing high-performance digital or signal-processing hardware Knowledge of integrating accelerator IP into … growth Work on genuinely innovative AI hardware and accelerator architectures Influence architectural decisions rather than simply implementing specifications Enjoy broad technical ownership across the ASIC development lifecycle Collaborate with a highly experienced, multidisciplinary engineering team Help shape products that push the boundaries of compute efficiency #J-18808-Ljbffr ...

GPUs, and neural accelerators is accelerating rapidly — and this company is at the forefront of that evolution. They are now looking for an experienced ASIC Design Engineer to join their Fabric IP team, bringing deep expertise in microarchitecture and RTL design to help shape the future of their technology portfolio. ...

Architect/Staff Embedded Software Engineer, you will be the foremost technical authority on hardware‐software integration across the DX‐1, spanning the ASIC, BMC, and photonic interconnect fabric, from pre‐silicon through post‐silicon and into sustainment engineering. We are looking for experienced Architect, Staff, and Principal‐level engineers … right way. Hold the technical bar. Define the principles, interface contracts, and standards the team builds to — whether that's firmware interfaces, ASIC validation methodology, or interconnect fabric integration — and ensure they are applied consistently. Make the hard calls in your domain. Own technical decision‐making within your area ...

Architect/Staff Embedded Software Engineers, you will be the foremost technical authority on hardware-software integration across the DX-1, spanning the ASIC, BMC, and photonic interconnect fabric, from pre-silicon through post-silicon and into sustainment engineering. We are looking for experienced Architect, Staff, and Principal-level engineers … right way. Hold the technical bar. Define the principles, interface contracts, and standards the team builds to — whether that’s firmware interfaces, ASIC validation methodology, or interconnect fabric integration — and ensure they are applied consistently. Make the hard calls in your domain. Own technical decision‐making within your area ...

Swedium Global Services is seeking an experienced ASIC Verification Engineer to join our growing verification team. You will lead SystemVerilog/UVM based verification, develop test plans, and verify UPF-powered features for complex ASIC/SoC designs. Remote from EU position with 8+ years of related experience; strong debugging ...

Resources is seeking a Senior DFT Engineer to join our ASIC team. You will shape DFT strategies across chip, subsystem, and IP levels, balancing structural and functional methods while delivering robust production-ready designs. The role involves hands-on use of Tessent DFT flows for MBIST, EDT, SSN, and IJTAG ...

OLIX in London seeks an Architect/Staff/Principal engineer to own hardware-software integration from pre-silicon to sustainment, spanning ASIC, BMC, and photonic interconnect fabric. You will partner with the Director of Software Engineering to set architectural direction, define standards, and drive cross‐functional teams while shaping ...

Leader - Base, RSUs, Bonus - 5 days onsite A rare opportunity has opened for a CPU ASIC Design Engineer to join one of the world’s most influential semiconductor companies at its flagship UK design centre in Cambridge. You’ll become part of an elite engineering organisation developing the technology behind … alongside leading architects and design teams to shape high-performance, low-power processor technology from early concept through to silicon delivery. As a CPU ASIC Design Engineer, you’ll play a key role in CPU RTL development, contributing to architectural exploration, microarchitecture definition, and complex implementation challenges where power, performance ...