defined radio. You'll have significant experience in some or all of the following areas: FPGA design, including experience with languages such as VHDL, Verilog, and High-Level Synthesis Modelling tools like MATLAB and Simulink Radiocommunications and Digital Signal Processing (DSP) techniques Software Defined Radio (SDR) and RF techniques Software More ❯
defined radio. You'll have significant experience in some or all of the following areas: FPGA design, including experience in languages such as VHDL, Verilog, and High-Level Synthesis Modelling tools such as MATLAB and Simulink Radio communications and Digital Signal Processing (DSP) techniques Software Defined Radio (SDR) and RF More ❯
C/C++, Assembly, Python). Familiarity with development boards like Arduino or Raspberry Pi. Experience with FPGAs and Hardware Description Languages (VHDL or Verilog). What We Offer: A dynamic and fast-paced environment working on state-of-the-art UxV technology. Opportunities for career growth in a high More ❯
job: A 1st or high 2:1 in a related Engineering degree (ideally a Red Brick University) Proven FPGA design experience using VHDL and Verilog Experience of developing firmware to meet well-defined specifications An interest in mobile communications This is a great opportunity for a Senior FPGA Design Engineer More ❯
aerospace or defence industry hardware development. Knowledge of signal integrity and thermal analysis. Understanding of systems engineering and requirements management. Experience with VHDL/Verilog for FPGA development. Familiarity with MATLAB, LabVIEW, or similar simulation tools. Awareness of radiation effects on electronics for space applications. BENEFITS: Competitive Basic Salary. More ❯
aerospace or defence industry hardware development. Knowledge of signal integrity and thermal analysis. Understanding of systems engineering and requirements management. Experience with VHDL/Verilog for FPGA development. Familiarity with MATLAB, LabVIEW, or similar simulation tools. Aware of radiation effects on electronics for space applications. BENEFITS: Competitive Basic Salary More ❯
years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯
years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯
portsmouth, hampshire, south east england, United Kingdom
Ubique Systems
years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯
Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯
Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯
portsmouth, hampshire, south east england, United Kingdom
K&K Talents
Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯
Portsmouth, Hampshire, South East, United Kingdom Hybrid / WFH Options
Enterprise Recruitment Limited
essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira … PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com More ❯
PO6, Portchester, Hampshire, United Kingdom Hybrid / WFH Options
Enterprise Recruitment Ltd
essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols – Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira … PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits: Bonus, Pension, Healthcare Key Skills : FPGA design, Verilog Apply: jamie AT enterpriserecruitment DOT com More ❯
Required Skills & Knowledge: Micro-architecture design RTL coding in System Verilog for aviation project Synthesis using Design Compiler/Fusion compiler 5 years SDC development LEC failure debugs RTL/gate level debug experience using tools such as Verdi More ❯
Required Skills & Knowledge: Micro-architecture design RTL coding in System Verilog for aviation project Synthesis using Design Compiler/Fusion compiler 5 years SDC development LEC failure debugs RTL/gate level debug experience using tools such as Verdi More ❯
portsmouth, hampshire, south east england, United Kingdom
Skywaves Rise
Required Skills & Knowledge: Micro-architecture design RTL coding in System Verilog for aviation project Synthesis using Design Compiler/Fusion compiler 5 years SDC development LEC failure debugs RTL/gate level debug experience using tools such as Verdi More ❯
show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯
show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯
portsmouth, hampshire, south east england, United Kingdom
ALOIS Solutions
show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯
OFDM applications System simulation Integrated single chip RF + digital baseband projects Top level chip simulation and functional verification Analogue behavioral language modeling (e.g. Verilog-AMS) Mixed-mode simulation environments (e.g. mixed Verilog and device level) Direct conversion Rx and Tx architectures and associated considerations DFT and BIST for analogue More ❯
Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System VerilogMore ❯
Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System VerilogMore ❯
portsmouth, hampshire, south east england, united kingdom
Stackstudio Digital Ltd
Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System VerilogMore ❯
basingstoke, south east england, United Kingdom Hybrid / WFH Options
Athsai
Mandatory Domain IP/SOC Verification “ Key Words “ SOC Verification, IP verification, Test development, Test Simulation Technical/Soft Skills IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Desired Skills Technical/Soft Skills Communication (spoken & written) Good Customer Handling Good Onsite and Offshore Coordination Analytical More ❯