Posted: 14.07.2025 Expiry Date: 28.08.2025 col-wide Job Description: Role Overview Are you ready to join a collaborative international development team known for its technical excellence, strong product design standards, and a culture that values growth, recognition, and a supportive work environment? At Sperry Marine , we provide safe, efficient, and reliable navigation solutions for the commercial and defence … responsibility for current and future design for developed SoC platforms. Collaborate closely with the Embedded Software and System Test teams during system integration activities. Maintain and improve FPGA development processes, workflows, and tools. Work autonomously in a focused, agile team, contributing high-quality results from the outset. About You We’re looking for a motivated and detail … Bash, TCL, or Python. Ability to understand and capture requirements to develop solutions and create professional technical documentation. Experience with Vivado is required; Xilinx (AMD) preferred. Familiarity with other FPGA vendors' tools is a plus. Knowledge of peripheral buses like I2C, SPI. Experience with AXI bus interconnect and memory interfaces such as SDRAM and DDR. Understanding of asynchronous interfaces More ❯
This position is perfect for an FPGA Engineer focused on innovation. You will be ahead of industry trends, collaborating with leading semiconductor companies and top engineers on challenging projects.In this small company, there's no micromanagementjust a focus on great work. Attend meetings when needed, but you have the freedom to design solutions your way. If you … enjoy solving complex problems independently, this role offers flexibility and autonomy. This FPGA Engineer role is primarily work from home, with required initial training and occasional visits to the company's office in Port Solent. These visits will focus on working with Hardware Engineers during hardware bring-up, testing, and debugging, while collaborating daily with an existing team of … four FPGA engineers. Despite being very well-established and highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer More ❯
This position is perfect for an FPGA Engineer focused on innovation. You will be ahead of industry trends, collaborating with leading semiconductor companies and top engineers on challenging projects.In this small company, there's no micromanagementjust a focus on great work. Attend meetings when needed, but you have the freedom to design solutions your way. If you … enjoy solving complex problems independently, this role offers flexibility and autonomy. This FPGA Engineer role is primarily work from home, with required initial training and occasional visits to the company's office in Port Solent. These visits will focus on working with Hardware Engineers during hardware bring-up, testing, and debugging, while collaborating daily with an existing team of … four FPGA engineers. Despite being very well-established and highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer More ❯
This position is perfect for an FPGA Engineer focused on innovation. You will be ahead of industry trends, collaborating with leading semiconductor companies and top engineers on challenging projects.In this small company, there's no micromanagementjust a focus on great work. Attend meetings when needed, but you have the freedom to design solutions your way. If you … enjoy solving complex problems independently, this role offers flexibility and autonomy. This FPGA Engineer role is primarily work from home, with required initial training and occasional visits to the company's office in Port Solent. These visits will focus on working with Hardware Engineers during hardware bring-up, testing, and debugging, while collaborating daily with an existing team of … four FPGA engineers. Despite being very well-established and highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer More ❯
Join to apply for the Senior FPGADesign Engineer/Hardware Engineer role at Maven Securities Join to apply for the Senior FPGADesign Engineer/Hardware Engineer role at Maven Securities Get AI-powered advice on this job and more exclusive features. ABOUT THE COMPANY: Maven is a market-leading proprietary trading firm … premier liquidity provider for globally listed derivatives. We leverage groundbreaking execution and pricing technologies to elevate and improve how financial markets operate. Overview: Where technology meets trading, the Maven FPGA team is pushing the bleeding edge of hardware and proprietary designs to maintain and gain advantage in an increasingly competitive environment. With operations in London, New York, Hong Kong … the necessary platforms to extend our leadership. The Role: Within our team, you will work with traders and technologists to seek and exploit opportunities to gain competitive advantage through FPGA systems. By means of reduced latencies, higher throughput, or increased robustness, you will enable the company to increase the efficiency of existing strategies and open up entirely new trading More ❯
create cutting-edge technologies that will improve how we diagnose and treat brain disorders, ultimately improving and saving the lives of patients across the world. The Role As an FPGA Engineer, you will be responsible for the design, development, and optimization of the FPGA components and embedded systems that enable CoMind's neuromonitoring technology. You will … speed communications, and sophisticated DSP algorithms. Your expertise will be critical in ensuring our devices meet stringent regulatory, safety, and performance standards. Responsibilities: Design, develop, and verify FPGA solutions for CoMind's neuromonitoring devices Develop FPGA-based prototypes to support technical de-risking efforts Create and execute verification test plans to support product verification and validation … Execute complete lifecycles for FPGA subsystems from concept through manufacturing release Participate in and conduct technical design reviews, architecture discussions, and project planning sessions Collaborate with electrical engineers, software engineers, mechanical engineers, and optics team members to ensure accurate definition, execution, and integration of FPGA components in the product Work closely with manufacturing partners to ensure More ❯
premier liquidity provider for globally listed derivatives. We leverage groundbreaking execution and pricing technologies to elevate and improve how financial markets operate. Overview: Where technology meets trading, the Maven FPGA team is pushing the bleeding edge of hardware and proprietary designs to maintain and gain advantage in an increasingly competitive environment. With operations in London, New York, Hong Kong … the necessary platforms to extend our leadership. The Role: Within our team, you will work with traders and technologists to seek and exploit opportunities to gain competitive advantage through FPGA systems. By means of reduced latencies, higher throughput, or increased robustness, you will enable the company to increase the efficiency of existing strategies and open up entirely new trading … engineering talents, problem solving abilities, and eagerness to take on new challenges are of significantly higher importance to us. The skills you will have: Source control management 5+ years FPGA experience Automated verification HLS or other DSP flow experience for FPGA Comfortable attacking new and unfamiliar problems Interest in trading Things we would like to see but are More ❯
ASIC Lead (Digital) who can drive a complex, high‐speed mixed‐signal chip from concept to mass production while line‐managing and mentoring a world‐class team of design engineers. You will own delivery of the digital subsystems that stitch together > 100 high‐bandwidth lanes, interface to fast‐settling DACs and ADCs, and run deterministic control loops at … DFT/DFD, static‐timing and physical implementation. Lead cross‐functional teams (digital, analog, verification, layout, packaging, test, firmware) through all silicon lifecycle stages: architecture ► spec ► RTL ► physical design ► sign‐off. Lead and line‐manage 6‐12 digital & mixed‐signal engineers: goal‐setting, performance reviews, recruiting, and skills development and maintain a culture of rapid, first‐time‐right … and clock‐mesh networks to guarantee end‐to‐end timing determinism and low‐latency control loops. Drive design verification strategy —UVM test‐benches, gate‐level sims, FPGAprototyping—and own silicon bring‐up test plans that hit first‐silicon functional goals. Optimise multi‐lane protocols for bandwidth scaling, skew management and power efficiency ; integrate error monitoring More ❯
ASIC Lead (Digital) who can drive a complex, high‐speed mixed‐signal chip from concept to mass production while line‐managing and mentoring a world‐class team of design engineers. You will own delivery of the digital subsystems that stitch together > 100 high‐bandwidth lanes, interface to fast‐settling DACs and ADCs, and run deterministic control loops at … DFT/DFD, static‐timing and physical implementation. Lead cross‐functional teams (digital, analog, verification, layout, packaging, test, firmware) through all silicon lifecycle stages: architecture ► spec ► RTL ► physical design ► sign‐off. Lead and line‐manage 6‐12 digital & mixed‐signal engineers: goal‐setting, performance reviews, recruiting, and skills development and maintain a culture of rapid, first‐time‐right … and clock‐mesh networks to guarantee end‐to‐end timing determinism and low‐latency control loops. Drive design verification strategy —UVM test‐benches, gate‐level sims, FPGAprototyping—and own silicon bring‐up test plans that hit first‐silicon functional goals. Optimise multi‐lane protocols for bandwidth scaling, skew management and power efficiency ; integrate error monitoring More ❯
