practical experience. Extensive experience in software and embedded development with C and C++ and familiarity with SoC and embedded CPU. Extensive experience in RISC-V architecture. Extensive experience in RTOS An understanding of network and web related protocols (e.g. TCP/IP, UDP, IPSEC, HTTP, HTTPS). An More ❯
have demonstrated experience with some of the following technologies: Computer graphics APIs such as OpenGL or Vulkan RTL design in Verilog ARM/RISC-V architecture concepts Modern software design practices in C++ Knowledge of compilers and tool chains Computer architectures Docker containers FPGA tool flows More ❯
and edge compute platforms - RISC-based, power-awareness, and latency focused. ROLE PROFILE: Architect scalable SoCs featuring programmable compute clusters (open-standard RISC-V or ARM-compatible), advanced AXI4-style interconnects, and multi-domain UPF power gating. Translate market signals into silicon roadmaps with quantifiable PPA targets. More ❯
in ASIC and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •FPGA Development •VHDL/Verilog •SystemVerilog •UVM Verification •Interconnect protocols such as AXI or OCP Requirements: •Be part of innovative, high-impact projects More ❯
in ASIC and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •SystemVerilog •UVM Verification •Digital verification using SystemVerilog, UVM, or cocotb •Formal Verification •Interconnect protocols such as AXI or OCP •ASIC tool flows •Familiarity More ❯
guiding important design decisions. We unify the domains of deterministic computation and performance to build a proof-generating virtual machine which runs common RISC-V Linux programs. This tool allows us to verify what is being run and ensure that it is being run according to our set More ❯
Senior Software Engineer - RISC-V at Trilitech, powered by Tezos Our Team At Trilitech, our mission is to power the Web3 revolution by building cutting-edge solutions on the Tezos blockchain. We specialise in core development, application development, and business development across three key areas: Culture, Decentralised Finance More ❯
Staff Software Engineer - RISC-V at Trilitech, powered by Tezos Our Team At Trilitech, our mission is to power the Web3 revolution by building cutting-edge solutions on the Tezos blockchain. We specialise in core development, application development, and business development across three key areas: Culture, Decentralised Finance More ❯
Software Engineer - Compiler Role Overview: Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization More ❯
Software Engineer - Compiler Role Overview: Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization More ❯
of reaching the interview stage by reading the complete job description and applying promptly. Role Overview: Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our … RISC-V vector extensions Implement code generation and optimization passes for graphics and AI workloads Contribute to shader compilers for Vulkan and other graphics APIs Work on vectorization and auto-parallelization strategies Collaborate with hardware team on ISA definition and enhancements Benchmark and optimize compiler performance for key … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization More ❯
Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization passes for graphics and AI … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization BS/MS in Computer Science or related More ❯
Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization passes for graphics and AI … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization BS/MS in Computer Science or related More ❯
Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization passes for graphics and AI … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization BS/MS in Computer Science or related More ❯
Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads.Making sure you fit the guidelines as an applicant for this role is essential, please read the below carefully. Key Responsibilities: Develop and maintain compiler backend … for our RISC-V vector extensions Implement code generation and optimization passes for graphics and AI workloads Contribute to shader compilers for Vulkan and other graphics APIs Work on vectorization and auto-parallelization strategies Collaborate with hardware team on ISA definition and enhancements Benchmark and optimize compiler performance … similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Strong C++ programming skills Background in performance analysis and optimization BS/MS in Computer Science or related More ❯
