7 of 7 Permanent Senior ASIC Engineer Jobs in London

Swediumglobal is seeking a Senior ASIC Design Verification Engineer to work remotely from the UK/EU. The ideal candidate will have over 8 years of experience, with strong expertise in UVM/SystemVerilog and hands-on experience with HPC protocols such as PCIe and DDR. This ...

innovative semiconductor startup developing advanced ASIC technology for next generation medical and neurotechnology applications is looking for a Senior Digital ASIC Design Engineer. Their work combines ultra low power digital design with analogue and mixed signal technology, creating highly integrated solutions for demanding applications. They are looking … Senior Digital Design Engineer to take ownership of the front end digital development of their ASICs. This is a hands on role covering architecture, RTL design, verification and supporting the design through to silicon. As a Senior Digital Design Engineer, you will: Own the architecture ...

Swedium Global Services is seeking an experienced ASIC Verification Engineer to join our growing verification team. You will lead SystemVerilog/UVM based verification, develop test plans, and verify UPF-powered features for complex ASIC/SoC designs. Remote from EU position with 8+ years of related ...

Resources is seeking a Senior Digital Design Engineer for a cutting-edge semiconductor startup delivering advanced ASICs for medical and neurotechnology. The role centers on front-end digital development, architecture, RTL design, verification and supporting silicon bring-up. You will own digital control interfaces, clocks and calibration with ...

leading technology firm in Greater London is seeking a highly skilled Senior/Principal Physical Design Engineer to drive the implementation of next-generation chip designs. The successful candidate will work on complex physical designs from synthesis to sign-off and collaborate with various engineering teams to optimize ...

MintNeuro in London seeks a Senior Digital Design Engineer to own front-end digital design and verification for next-generation mixed-signal ASICs used in implantable neural interfaces. You will write clean Verilog/SystemVerilog, develop robust verification environments, drive RTL from concept to tape-out, and collaborate ...

Swedium Global Services is seeking a Senior Physical Design Engineer (remote from the UK/EU) to drive timing closure for ASIC/SoC designs across advanced nodes, including <5nm processes. You will work closely with PD, RTL, Synthesis, and Signoff teams to resolve timing and clock ...