has a strong technical foundation. Ideal candidates will have: Deep understanding of System on Chip (SoC) based design and build environment. Experience with HDL coding and test benching (VHDL, Verilog). Proficiency in software languages, C (or C++), with additional languages considered useful. Knowledge of Bash, TCL, or Python. Ability to understand and capture requirements to develop solutions and create More ❯
a strong technical foundation. Ideal candidates will have: Deep understanding of System on Chip (SoC) based design and build environment. A prerequisite of HDL coding and test benching (VHDL, Verilog). Software languages, C (or C++) is preferable, additional languages considered useful. Knowledge of one or more of Bash, TCL, or Python Should be confident understanding and capturing requirements in More ❯
of electronic assemblies Support troubleshooting, debugging, and failure analysis of electronic systems during development and production. Skills & Experience: 3+ years experience in FPGA design, instrumentation applications preferred Fluency in Verilog/VHDL, safety-critical design experience preferred Proficiency using Vivado Design Suite for RTL, HLS, and simulation Familiarity with high-performance devices such as Xilinx Ultrascale FPGAs Experience designing hardware More ❯
digital team that delivered high speed ASICs containing high‐speed mixed‐signal interfaces (display drivers, image sensors, SerDes, RF SoCs, etc.). Strong command of RTL design (SystemVerilog/Verilog), CDC/RDC, STA, place‐and‐route, power intent (UPF/CPF) and DFT/DFD methodologies. Demonstrated success coordinating multi‐lane data paths, clock distribution and fast‐settling DAC More ❯
digital team that delivered high speed ASICs containing high‐speed mixed‐signal interfaces (display drivers, image sensors, SerDes, RF SoCs, etc.). Strong command of RTL design (SystemVerilog/Verilog), CDC/RDC, STA, place‐and‐route, power intent (UPF/CPF) and DFT/DFD methodologies. Demonstrated success coordinating multi‐lane data paths, clock distribution and fast‐settling DAC More ❯
and problem-solving skills with a high-level of self-management and self-motivation Excellent verbal and written communication skills Experience - Desirable Experience in block-level Layout Knowledge of Verilog-A Demonstrated experience of MOSFET device modelling frameworks (BSIM preferred) Programming knowledge (Python, SKILL preferably) Knowledge of CMOS fabrication technology Benefits Be part of a creative, world-leading team Competitive More ❯
and problem-solving skills with a high-level of self-management and self-motivation Excellent verbal and written communication skills Experience - Desirable Experience in block-level Layout Knowledge of Verilog-A Demonstrated experience of MOSFET device modelling frameworks (BSIM preferred) Programming knowledge (Python, SKILL preferably) Knowledge of CMOS fabrication technology Benefits Be part of a creative, world-leading team Competitive More ❯
and problem-solving skills with a high-level of self-management and self-motivation Excellent verbal and written communication skills Experience - Desirable Experience in block-level Layout Knowledge of Verilog-A Demonstrated experience of MOSFET device modelling frameworks (BSIM preferred) Programming knowledge (Python, SKILL preferably) Knowledge of CMOS fabrication technology Benefits Be part of a creative, world-leading team Competitive More ❯
and motivated Hardware Design Engineer to join our UK GPU team. Candidates with GPU architecture or design experience are highly preferred. Responsibilities: Spec writingDevelop and implement RTL designs using Verilog/SystemVerilog/VHDL for complex digital blocks. Collaborate closely with architecture, verification, and physical design teams throughout the development cycle. Perform design synthesis, linting etc.Participate in design reviews and … years of experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL.Familiar with ASIC design flow and tools (e.g., lint, synthesis, simulation). Strong debugging and problem-solving skills. Desired Requirements:Experience with GPU design or computer graphics More ❯
London, South East, England, United Kingdom Hybrid / WFH Options
MicroTECH Global Ltd
and motivated Hardware Design Engineer to join our UK GPU team. Candidates with GPU architecture or design experience are highly preferred. Responsibilities: Spec writingDevelop and implement RTL designs using Verilog/SystemVerilog/VHDL for complex digital blocks. Collaborate closely with architecture, verification, and physical design teams throughout the development cycle. Perform design synthesis, linting etc.Participate in design reviews and … years of experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL.Familiar with ASIC design flow and tools (e.g., lint, synthesis, simulation). Strong debugging and problem-solving skills. Desired Requirements: Experience with GPU design or computer graphics More ❯
in ASIC and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •FPGA Development •VHDL/Verilog •SystemVerilog •UVM Verification •Interconnect protocols such as AXI or OCP Requirements: •Be part of innovative, high-impact projects in a fast-moving industry •Collaborate with a global team of expert More ❯
PhD (or equivalent experience) in Computer Science, Computer Engineering, or related fields Experience with application development in Python Knowledge of open-source development practices and community engagement Familiarity with Verilog/SystemVerilog and EDA tool flows, especially for design verification Strong teamwork and communication skills Preferred Qualifications (not required): Experience working with a silicon development team Knowledge of SoC architecture More ❯
City of London, London, United Kingdom Hybrid / WFH Options
Platform Recruitment Limited
tapeout on next-generation chip architectures in areas like memory, interconnect, and high-speed interface design. Key Responsibilities: + Develop and Integrate designs of RTL for digital blocks (using Verilog/SystemVerilog/VHDL) + Undertake Digital IC Design processes & Perform design synthesis, linting + Complete projects from conception to completion Skills Required: + Experience with frontend RTL Design + … Strong Experience with SystemVerilog, Verilog or VHDL + Has had exposure to ASIC design flow (Lint, syntheisis, simulation) + Digital Design Principles experience pipelining, clock domain crossing Further Details: This role offers remote working with a potential visit into the office every month. A competitive salary, bonus scheme, and a strong benefits package. If you are a driven and experienced More ❯
Outstanding Electronics Engineers sought to join a development team designing advanced FPGA-accelerated hardware to power the future of the internet. Joining this team, you would work at the cutting edge of digital design, creating connectivity solutions which will underpin More ❯
and refined for a specialised edge. You’ll work on designs featuring high-speed serial I/O, PCIe interfaces, and large-scale FPGA deployments. The tooling is standard, (Verilog/SystemVerilog, Verilator, and C++,) what you build needs to be anything but. If the manufacturer thinks it's possible with their hardware, you've not gone far enough. Being More ❯
and refined for a specialised edge. You’ll work on designs featuring high-speed serial I/O, PCIe interfaces, and large-scale FPGA deployments. The tooling is standard, (Verilog/SystemVerilog, Verilator, and C++,) what you build needs to be anything but. If the manufacturer thinks it's possible with their hardware, you've not gone far enough. Being More ❯
