1 to 25 of 44 Permanent Verilog Jobs in London

Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience More ❯

Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience More ❯

Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience More ❯

dynamic team in our Design Centre in Edinburgh, Scotland. JOB RESPONSIBILITIES: Concept definition of digital SOC architecture & blocks Specification writing RTL design & verification ((System)Verilog/VHDL/FPGA) Close working with analog IC designers and sub-contractors Experience with design synthesis, timing closure & STA is highly desirable Support DfT More ❯

who enjoys hands-on innovation and working across multidisciplinary challenges. Key Skills and Requirements: 3+ years of experience in FPGA firmware development (VHDL/Verilog) using toolchains such as Vivado or Quartus. Proven track record of design and implementation of complex systems. Strong academic background with a relevant engineering or More ❯

They are looking for an FPGA Engineer with the following experience: FPGA Design and Development. DSP Experience in an FPGA Environment. Experience in VHDL, Verilog and SystemVerilog. Software Design in C, C++ or Python. Knowledge of Sonar, Radar or other sensor systems. High Level Synthesis (HLS) experience. If you are More ❯

firmware designs follow established processes. Required Skills and Experience: • Experience in design techniques using VHDL. • Experience in verification techniques using either VHDL or System Verilog/UVM. • Experience in specifying timing and area constraints for efficient FPGA place and route. • Ability to analyze system-level requirements and derive detailed firmware More ❯

all levels welcome Proven experience verifying large System on Chip (SoC) designs. Expertise in DSP, Wireless Communication, and networking standards. Hands-on experience with Verilog, SystemVerilog, UVM, and/or VHDL. Strong verification mindset with in-depth knowledge of verification goals, practices, and methodologies. Practical experience with scripting languages such More ❯

FPGA-based digital signal processing applications (using VHDL) Developing software/firmware for target devices including FPGAs, ARM processors, GPUs, microcontrollers (using VHDL or Verilog) Designing signal processing algorithms Mathematical modelling Benefits: Alongside a competitive pension scheme, BAE Systems offers employee share plans, flexible discounted health, wellbeing & lifestyle benefits, including More ❯

debugging, and failure analysis of electronic systems during development and production. Skills & Experience: 3+ years experience in FPGA design, instrumentation applications preferred Fluency in Verilog/VHDL, safety-critical design experience preferred Proficiency using Vivado Design Suite for RTL, HLS, and simulation Familiarity with high-performance devices such as Xilinx More ❯

in development today. Key Responsibilities Define digital architecture and block-level concepts Develop detailed specifications for digital functions RTL design and verification using SystemVerilog, Verilog, or VHDL Collaborate closely with analog IC designers and subcontractors Debug RTL and gate-level simulation failures Write scripts in Python, Perl, or similar for More ❯

We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •FPGA Development •VHDL/Verilog •SystemVerilog •UVM Verification •Interconnect protocols such as AXI or OCP Requirements: •Be part of innovative, high-impact projects in a fast-moving industry •Collaborate with More ❯

electronic circuits and systems Own schematic capture and PCB layout for digital, analog, and mixed-signal boards Develop embedded systems using FPGAs (VHDL/Verilog), microcontrollers, and SOCs Support full product lifecycle — from lab integration to production and field deployment Collaborate across RF, firmware, software, and mechanical teams Maintain design More ❯

Computer Science, Computer Engineering, or related fields Experience with application development in Python Knowledge of open-source development practices and community engagement Familiarity with Verilog/SystemVerilog and EDA tool flows, especially for design verification Strong teamwork and communication skills Preferred Qualifications (not required): Experience working with a silicon development More ❯

experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog More ❯

technical expertise and strategic mindset will be key to driving the team forward. You should have: Extensive FPGA Development Experience – Proficiency in VHDL/Verilog, with a strong understanding of low-latency optimisation. ASIC Design Mastery – A track record of delivering ASIC projects that meet demanding performance metrics. Strategic Vision More ❯

years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯

years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯

years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn More ❯

Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯

Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯

Mandatory Skills: SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and willingness to learn Note: Applicants for employment in the United Kingdom should possess work More ❯

engineering teams. You must have demonstrated experience with some of the following technologies: Computer graphics APIs such as OpenGL or Vulkan RTL design in Verilog ARM/RISC-V architecture concepts Modern software design practices in C++ Knowledge of compilers and tool chains Computer architectures Docker containers FPGA tool flows More ❯

Required Skills & Knowledge: Micro-architecture design RTL coding in System Verilog for aviation project Synthesis using Design Compiler/Fusion compiler 5 years SDC development LEC failure debugs RTL/gate level debug experience using tools such as Verdi More ❯

Required Skills & Knowledge: Micro-architecture design RTL coding in System Verilog for aviation project Synthesis using Design Compiler/Fusion compiler 5 years SDC development LEC failure debugs RTL/gate level debug experience using tools such as Verdi More ❯