Senior/Staff/Principal Design Engineer - Media IP
Manchester, Lancashire, United Kingdom
Hybrid / WFH Options
Hybrid / WFH Options
Arm Limited
with colleagues in the verification teams, modelling teams, software driver developers, multimedia architects and imaging researchers. Mentor & support other members of the team Required skills and experience: Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted: