Permanent Verification Engineer Jobs in the North East

2 of 2 Permanent Verification Engineer Jobs in the North East

Design Verification Engineer

Newcastle upon Tyne, England, United Kingdom
JR United Kingdom
Social network you want to login/join with: Design Verification Engineer, Newcastle-upon-Tyne, Tyne and Wear Client: ALOIS Solutions Location: Newcastle-upon-Tyne, Tyne and Wear, United Kingdom Job Category: Other EU work permit required: Yes Job Views: 1 Posted: 31.05.2025 Expiry Date: 15.07.2025 Job Description: Verify CPU connectivity to IP blocks (using ASM boot , C … code, GNU toolchain ) Write test plans, define test methodologies, develop test benches, write test cases, complete functional verification, and close coverage for all the design blocks in the SoCs/Subsystems. Run regressions, debug test failures, and file bug reports as needed. Develop tests to meet functional and code coverage requirements based on analysis of coverage gaps. Provide verification reports demonstrating all tests passing on RTL. Utilize methodologies including design checks, verification with simulators and emulators: UVM, formal, Verilog/SystemVerilog testbenches, and C, SystemVerilog, UVM test cases. #J-18808-Ljbffr More ❯
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Design Verification Engineer

Newcastle upon Tyne, UK
ALOIS Solutions
Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot, and C code, GNU toolchain) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs … test failures and file bug report as needed. • Develop tests to meet functional coverage and code coverage requirements defined for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal More ❯
Employment Type: Full-time
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