Permanent SystemVerilog Jobs in Oxford

6 of 6 Permanent SystemVerilog Jobs in Oxford

Senior FPGA Engineer

oxford district, south east england, United Kingdom
Hybrid / WFH Options
IC Resources
immense potential in quantum technology. The ideal Senior FPGA Engineer will have: Strong experience of FPGA implementation in real-time system contexts Proficiency in SystemVerilog or Migen Solid understanding of real-time hardware/software co-design and debugging Experience with common software languages (Python, Rust, etc.) Familiarity with version More ❯
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Senior Design Verification Engineer

oxford district, south east england, United Kingdom
Platform Recruitment
metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures More ❯
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Verification Validation Engineer

oxford district, south east england, United Kingdom
Ubique Systems
Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage experience GLS working experience Proficient in C/System Verilog and UVM Working knowledge of GIT Soft skill - Good Communication and More ❯
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Design Verification Engineer

oxford district, south east england, United Kingdom
ALOIS Solutions
Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot , and C code, GNU toolchain ) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing More ❯
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DV Engineer/Lead

oxford district, south east england, united kingdom
Stackstudio Digital Ltd
Role - DV Engineer Location:EU/Remote Mandatory Skill: IP/SOC verification Verilog, System Verilog, UVM Code Coverage, functional coverage Industry Experience : 5 to 10 years SOC Verfication Experience on ARM Ecosystem PCIE Experience and also PCIE-VIP usage More ❯
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RTL Design/Lead

oxford district, south east england, united kingdom
Stackstudio Digital Ltd
Role - RTL Design/LeadLocation:EU/Remote Mandatory Skill: SoC Integrtion, IP integration RTL design & Coding RTL lint, RTL CDC Verilog/System Verilog Industry Experience : 5 to 10 years SoC Design engineer with experience working on SOCs based More ❯
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