Permanent SystemVerilog Jobs in the South East

7 of 7 Permanent SystemVerilog Jobs in the South East

FPGA Design Engineer

Reading, Berkshire, South East, United Kingdom
Hybrid / WFH Options
Fortis Recruitment Solutions
to flight qualification. Key Skills & Experience Essential: Degree in Electronic/Electrical/Computer Engineering (or equivalent) Strong experience in digital design with VHDL and/or Verilog/SystemVerilog Proven track record performing synthesis, timing closure, and static timing analysis Experience with FPGA tool flows (e.g. Xilinx Vivado, Intel/Altera tools, or similar) Familiarity with simulation/verification More ❯
Employment Type: Permanent, Work From Home
Salary: £70,000
Posted:

Senior FPGA Design Engineer

Southampton, Hampshire, South East, United Kingdom
Hybrid / WFH Options
Fortis Recruitment Solutions
signal processing applications Contribute to architecture decisions, documentation, and technical reviews Collaborate across disciplines (design, verification, algorithms, implementation, system integration) Key Skills & Experience Essential: Expert knowledge of RTL (Verilog, SystemVerilog) for FPGA/ASIC products Strong track record delivering FPGA/ASIC digital designs Experience with synthesis, static timing analysis, power optimisation, and high-throughput design Proficiency with industry-standard More ❯
Employment Type: Permanent, Work From Home
Salary: £80,000
Posted:

Senior FPGA Design Engineer

portsmouth, hampshire, south east england, united kingdom
Hybrid / WFH Options
Fortis Recruitment Solutions
signal processing applications Contribute to architecture decisions, documentation, and technical reviews Collaborate across disciplines (design, verification, algorithms, implementation, system integration) Key Skills & Experience Essential: Expert knowledge of RTL (Verilog, SystemVerilog) for FPGA/ASIC products Strong track record delivering FPGA/ASIC digital designs Experience with synthesis, static timing analysis, power optimisation, and high-throughput design Proficiency with industry-standard More ❯
Posted:

Formal Verification Engineer (Grad-Senior)

London, South East, England, United Kingdom
Avanti
successful in this role you’ll need: A BSc/MSc/PhD in EEE/Maths/Physics Fluency in at least one of VHDL/Verilog/Systemverilog Ideally a Linux/Unix background It would be great if you also had: Knowledge of RISC-V/Arm/x86 Experience in ML or AI An understanding at More ❯
Employment Type: Full-Time
Salary: Salary negotiable
Posted:

FPGA Engineer

Berkshire, United Kingdom
Active Silicon
bachelor s degree in electronic engineering or a related field. At least 3+ years of commercial FPGA and general hardware design experience. Proficient in FPGA design using VHDL/SystemVerilog with AMD (Xilinx), Lattice, or Intel (Altera) products. Familiar with high-speed interfaces and advanced simulation methods. Strong communication skills for effective collaboration with team members and clients.What we offer More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

FPGA Engineer

Langley, Slough, Berkshire, England, United Kingdom
Active Silicon
bachelor’s degree in electronic engineering or a related field. At least 3+ years of commercial FPGA and general hardware design experience. Proficient in FPGA design using VHDL/SystemVerilog with AMD (Xilinx), Lattice, or Intel (Altera) products. Familiar with high-speed interfaces and advanced simulation methods. Strong communication skills for effective collaboration with team members and clients. What we More ❯
Employment Type: Full-Time
Salary: Competitive salary
Posted:

FPGA Engineer

Southampton, England, United Kingdom
IC Resources
and space-qualified ASICs. As an FPGA Engineer, you will: Translate complex signal processing algorithms into efficient RTL architectures Design and verify FPGA and ASIC IP using Verilog/SystemVerilog Validate and integrate designs on the latest FPGA development platforms Collaborate across architecture, verification, and physical implementation teams Contribute to UVM test environments and technical documentation Key skills required for … the FPGA Engineer: Strong RTL experience (Verilog/SystemVerilog) targeting FPGAs or ASICs Skilled in timing closure, synthesis, and power/resource optimisation Experience working on high-throughput digital signal processing blocks Familiarity with communications algorithms (e.g. FEC, beamforming) is a bonus Knowledge of UVM, scripting (Python), or AMBA protocols is desirable If you’re interested in the position of More ❯
Posted:
SystemVerilog
the South East
25th Percentile
£85,000
Median
£90,000
75th Percentile
£95,000