1 to 25 of 33 Permanent UVM Jobs in the South East

implementing complex FPGA architectures using VHDL , Simulink , and related tools Targeting devices from leading vendors including Xilinx , Intel , and Microsemi Developing verification environments and testbenches using VHDL , SystemVerilog , and UVM methodologies Utilizing industry-standard toolsets such as QuestaSim and ModelSim Writing and integrating low-level software in C to support FPGA testing and embedded system integration Producing high-quality design More ❯

project delivery Expertise in developing complex FPGA architectures and implementations using VHDL, Simulink, and targeting Xilinx, Intel, or Microsemi devices Proficiency in FPGA verification using VHDL and SystemVerilog/UVM testbench methodologies Familiarity with FPGA toolsets and Mentor Graphics verification tools such as QuestaSim and ModelSim Ability to write low-level software in C for FPGA testing and embedded system More ❯

ASIC systems Strong grasp of synthesis, timing closure, and resource optimisation for high-speed signal processing applications Experience developing and integrating IP in multi-block hardware systems Familiarity with UVM verification methodologies and testbench development Skilled in simulation, lab-based validation, and system integration using industry-standard tools Ability to collaborate across design, verification, and algorithm teams Strong documentation and More ❯

who hold UK citizenship or work authorization. Essential Skills 5+ years of design verification experience. Strong hands-on experience in functional verification of complex IP using System Verilog and UVM and developing reusable and scalable code. Strong scripting skills (UNIX shell scripting as well as e.g. TCL, Perl). Expert working knowledge of assertion-based verification. Hands-on RTL Debug More ❯

driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g., UPF More ❯

throughput FPGA or ASIC IP, ideally in signal processing or comms applications Expertise in simulation, synthesis, timing optimisation, and lab-based validation Proficiency with industry-standard EDA tools and UVM-based verification Ability to lead projects, define architecture, and support junior engineers Comfortable collaborating across hardware, software, and systems disciplines Space or satellite comms experience is not essential—but curiosity More ❯

At CesiumAstro , we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to More ❯

related discipline. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF More ❯

IC's. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Strong ability to interpret results and resolve problems An innovative, creative, lateral thinking problem solver Preferred Skills More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

the Algorithm team to understand requirements and translate them into architectures for RTL implementations Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches Deploy your designs onto the latest FPGA development platforms for validation and system integration Actively engage with and adhere to AccelerComm engineering methodology, processes and design techniques, being … EDA tools for simulation and synthesis Desirable: Knowledge of communications signal processing algorithms (such as error correction, equalisation, channel estimation, beamforming) Familiar with the AMBA bus protocol Understanding of UVM verification techniques or practical experience using UVM for IP verification Experience using C SystemC for design modelling and integration Knowledge of a scripting language, such as Python Knowledge and appreciation More ❯

fabrics. Your work will ensure first‐silicon success and robust, production‐worthy silicon that scales to data‐centre volumes. Responsibilities Architect, implement and maintain comprehensive verification environments (SystemVerilog + UVM, assertion‐based and formal) for datapath, control, memory and high‐speed I/O blocks in our OTPU. Define verification plans that target functional correctness, low‐power modes, safety, reliability … keep Flux at the forefront of silicon quality. Skills & Experience 3+ years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and power‐domain management, DFT/scan and low‐power (UPF/CPF) methodologies. Strong scripting More ❯

role, shaping the future of the verification team. What You'll Need: In-depth understanding of verification flows, test plans, and strategies. Expertise in constrained-random SystemVerilog testbenches using UVM or VMM. Experience in creating and examining functional coverage and writing SystemVerilog assertions. Skills in debugging RTL and gate-level simulation failures and firmware. Familiarity with bug tracking tools like More ❯

requirements into hardware team deliverables Support discussions with customers during presales and product development Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches Lead AccelerComm's engineering methodology, processes and design techniques Nurture professional growth of team members through regular mentoring, coaching, and feedback Skills, Knowledge & Expertise Essential Skills and Experience … across the design lifecycle including agile and waterfall, requirements capture and traceability. Desirable: Knowledge of communications signal processing algorithms (such as error correction, equalisation, channel estimation, beamforming) Understanding of UVM verification techniques or practical experience using UVM for IP verification Experience using C SystemC for design modelling and integration Experience in Technology Readiness Models Experience in system architecture of a More ❯

the Algorithm team to understand requirements and translate them into architectures for RTL implementations. Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches. Actively engage with and adhere to engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the … timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis Familiar with the AMBA bus protocol Understanding of UVM verification techniques or practical experience using UVM for IP verification. This is a Hybrid working role and you must be able to work onsite 2-3 days per week. For More ❯

Work closely with the exec team to translate product requirements into hardware team deliverables. Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches. Lead engineering methodology, processes and design techniques. Nurture professional growth of team members through regular mentoring, coaching, and feedback Skills, Knowledge & Expertise: Track record of building and leading … for ASIC and FPGA. Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis. Understanding of UVM verification techniques or practical experience using UVM for IP verification. This is a Hybrid working role and you must be able to work onsite 2-3 days per week. For More ❯

get in touch. 1. Verification Lead (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Leadership role managing SoC/IP-level verification Requirements: 6+ years experience, strong SystemVerilog/UVM, team mentorship 2. Hardware Verification Engineer (Permanent/Contract) Location: Hemel Hempstead, UK (Hybrid Preferred | Remote Considered) Type: Contract (Outside IR35) Focus: RISC-V, GPU, AI, complex SoCs Requirements: 5+ … years experience, SystemVerilog/UVM, scripting 3. Junior/Mid-Level Verification Engineer (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Perfect for engineers early in their verification careers Requirements: 1+ year experience, familiarity with SystemVerilog/UVM If any of these sound like a fit, please feel free to reach out or send your CV. If these roles are More ❯

working on a diverse range of projects that will both challenge and develop your technical and verification skills. You will have a good understanding of different methodologies, particularly SystemVerilog, UVM and MS-UCM. You will have the ability to quickly assimilate the verification challenge and help define an effective (and pragmatic) verification strategy and gain the support of the end More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯