7 of 7 Permanent Low Latency Jobs in the South West

A cutting-edge startup in Cambridge is seeking a visionary Head of FPGA to lead the design and development of ultra-low latency trading infrastructure. This is a unique opportunity to drive hardware strategy and oversee a talented engineering team at the forefront of technological innovation. Your work … hardware engineering roadmap, with a sharp focus on ASIC design and high-performance FPGA solutions. Drive Design Excellence: Architect and oversee the development of low-latency, high-speed hardware systems that power next-generation trading platforms. Foster Collaboration: Work closely with software teams, system architects, and business stakeholders … be key to driving the team forward. You should have: Extensive FPGA Development Experience – Proficiency in VHDL/Verilog, with a strong understanding of low-latency optimisation. ASIC Design Mastery – A track record of delivering ASIC projects that meet demanding performance metrics. Strategic Vision and Leadership – Ability to More ❯

and implementation of future ASIC solutions. Their technology provides fast and easy conversion of trained Neural Networks into minuscule AI silicon chips with ultra-low power consumption, low latency and small size. Responsibilities Lead architectural discussions and drive design decisions for ASIC projects, ensuring alignment with overall … in hardware description languages, with experience in simulation and synthesis tools. Preferred: Familiarity with FPGA prototyping and hardware-software co-design methodologies. Knowledge of low-power design techniques and methodologies. Experience with system-level design and architecture, particularly in multi-core and multi-threaded environments. Please note: You must More ❯

proposing enhancements, and fostering a culture of data quality and continuous improvement across teams. Familiarity with testing live video streaming solutions, focusing on performance, low latency, and seamless user experiences would be advantageous Our Tech Stack C++/Computer Vision: C+/20, Qt, Boost, ZeroMQ, ElasticSearch. Web More ❯

and multiple clock domain interface management. Their technology provides fast and easy conversion of trained Neural Networks into miniscule AI silicon chips with ultra-low power consumption, low latency and small size. Key Responsibilities Develop test benches and test cases for block-level functional verification. Work with More ❯

the best names in high tech venture capital. XMOS is a leader in cycle-accurate software programmability. Our customers blend control, DSP, AI, and low-latency I/O processing to rapidly solve a wide variety of problems in millions of products within the consumer, industrial, and automotive More ❯

full-lifecycle development — from prototyping and simulation to field deployment and operational validation. Software Defined Radio (SDR): Architect reconfigurable, ultra-reliable SDR systems with low-latency DSP pipelines. Embedded Signal Processing: Implemented and optimised RF algorithms across C/C++, VHDL, and FPGA environments. Field Trial Execution: Own More ❯

/ML & Computer Vision. Strong technical background with an emphasis on architecture and system design. Preference for candidates with experience building real-time or low-latency systems – not essential. Ability to lead without being hands-on – this role is more strategic and people-focused. Excellent communication and stakeholder More ❯