Hardware Design Engineer with Lab Eval Experience Salary: Very Attractive Rate Location: N/A Full Time Hardware Design EngineerExperience Required:The candidate should have experience in some or all of the following areas: Low-power circuit design, DC/DC converters, power management methods, and analogue design and mixed-signal board … 345MHz, 433MHz, 868MHz, 2.4GHz Experience integrating RF technologies such as Zigbee, Zwave, WIFI, BlueTooth. Leading and driving design development from schematic capture, PCB layout through assembly, and test house validation Robust designs for ESD/EMI immunities and RF de-sensitisation. Partnering with software teams to define and implement firmware, drivers and algorithms Additional Requirements … a diverse set of stakeholders across multiple disciplines Have strong communication and documentation skills and ability to operate autonomously Have a good understanding of manufacturing process including DFM and DFTfor consumer products Have a good working knowledge of the technical concepts involved in the development of products and processes Principal Analog AMS RF Recruitment Specialist More ❯
Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: We are searching for a Principal level radio frequency integrated circuit (RFIC)/Analogue design engineer to join a strong group of RFIC designers to help lead Qualcomm in the development of RF transceivers to address the IoT market. Working within … a dynamic design team you will participate in the development of next generation RFIC products in the IoT wireless space. RESPONSIBILITIES: Specify, design and verify key circuits and sub-systems of integrated RF transceivers Work closely with other teams to facilitate the design and production process, e.g. Software, Signal Processing, Product Integration, Sales & Marketing … and functional verification Analogue behavioral language modeling (e.g. Verilog-AMS) Mixed-mode simulation environments (e.g. mixed Verilog and device level) Direct conversion Rx and Tx architectures and associated considerations DFT and BIST for analogue and RF circuits Silicon test and de-bugging KEY WORDS: CMOS IoT RF and analogue RFIC Designer Cadence years' experience in RFIC designMore ❯
of solving problems until now considered impossible, with applications ranging across a broad range of industries, including healthcare, materials and aerospace. We are looking to hire an Electronics Engineer Test - IC Validation/Evaluation to join an established ASIC design group working on developing and running measurement solutions to evaluate a range of cryogenic-compatible ASICs and … you, so get in touch! What You'll Accomplish: Work closely with the design team to implement DesignforTest (DFT) best practices and improve product documentation. Responsible for the creation of reports detailing the performance of ASICs at nominal and cryogenic temperatures. Working with the hardware group, develop … root causes of functional or performance deviations. The 3 Most Critical Attributes We'll Use to Compare Candidates : Experience with detailed product evaluation and able to give recommendations on DFT improvements or hardware requirements. Ability to develop practical test solutions to non-standard silicon and operating environments. Willingness to work in a team to debug silicon or manufacturing issues More ❯
a knack for functional testing and fault-finding? Looking for a role that will allow you to roll up your sleeves, take ownership of critical test processes, and ensure that high-reliability systems perform at their best? We're working with a world-leading aerospace and defence technology provider located in Fife, Scotland, as they … look to strengthen their Manufacturing Test Engineering team on the back of several new and exciting projects. This role focuses on developing and maintaining test solutions to ensure high performance and quality across the product lifecycle in a low-volume, high-reliability manufacturing environment. What will you be doing? This is a key senior role in the manufacturing … functional test solutions, including updates to hardware and software. Collaborating with design engineering to resolve issues and contribute to early-stage product development through DFM/DFT input. Leading root-cause analysis and continuous improvement activities, with a focus on first-time yield. Mentoring junior engineers and technicians, while clearly presenting technical content to stakeholders. To thrive More ❯
Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: We are searching for a Principal level radio frequency integrated circuit (RFIC)/Analogue design engineer to join a strong group of RFIC designers to help lead Qualcomm in the development of RF transceivers to address the IoT market. Working within … a dynamic design team you will participate in the development of next generation RFIC products in the IoT wireless space. RESPONSIBILITIES: Specify, design and verify key circuits and sub-systems of integrated RF transceivers Work closely with other teams to facilitate the design and production process, e.g. Software, Signal Processing, Product Integration, Sales & Marketing … and functional verification Analogue behavioral language modeling (e.g. Verilog-AMS) Mixed-mode simulation environments (e.g. mixed Verilog and device level) Direct conversion Rx and Tx architectures and associated considerations DFT and BIST for analogue and RF circuits Silicon test and de-bugging KEY WORDS: CMOS IoT RF and analogue RFIC Designer Cadence years' experience in RFIC designMore ❯
Working for a leader in the Semi's industry, I am looking to recruit a high-level, Senior SOC Architect. This position can be based in Edinburgh or Cork. You will be tasked with the definition and development of existing and new SOC product architecture - across a variety of complex digital and high-speed products and applications. The … main focus are the technical requirements, but this position also offers the opportunity for team leadership and management. Key skills/requirements: BSc/MSc/PhD in Micro-electronics, physics, or similar field 10+ years' experience in complex SOCs Deep understanding of … Subsystems, Memory Controllers, and memory architectures (e.g., SRAM, ROM, eFuse) Extensive experience with the Digital ASIC Flow, RTL design (Verilog), synthesis, timing closure, and debug methodologies (e.g., DFT, JTAG, Scan, BIST). Extensive knowledge of SOC architecture, setup/silicon bring-up, validation, and all associated processes. SOC design, system design, architecture, and IP More ❯
other members of the design team and project stakeholders at design reviews. All designs should follow DFM (Designfor Manufacture) and DFT (DesignforTest) principles, including PCB type testing, PCB manufacture testing and Charger level testing. Participates openly in peer reviews of other engineer’s designs. … component obsolescence/availability problems - involves working closely with purchasing, suppliers and external sub-contractors (such as CEM’s - contract electronics manufacturers). Work closely with System and PCB Test assisting in developing and documenting test procedures for sub-systems and complete chargers. Ensure all relevant safety regulations are met in design related activities … require interfacing to third party products and dealing directly with sub-contractor design teams. Provide technical training on new products to all key departments, e.g. Service, System Test, Production, Engineering and Sales. Skills and Qualifications: Wide knowledge of the range of PCB’s and how the chargers work. Schematic layout (OrCad). PCB layout (OrCad). Use More ❯
other members of the design team and project stakeholders at design reviews. All designs should follow DFM (Designfor Manufacture) and DFT (DesignforTest) principles, including PCB type testing, PCB manufacture testing and Charger level testing. Participates openly in peer reviews of other engineer’s designs. … component obsolescence/availability problems - involves working closely with purchasing, suppliers and external sub-contractors (such as CEM’s - contract electronics manufacturers). Work closely with System and PCB Test assisting in developing and documenting test procedures for sub-systems and complete chargers. Ensure all relevant safety regulations are met in design related activities … require interfacing to third party products and dealing directly with sub-contractor design teams. Provide technical training on new products to all key departments, e.g. Service, System Test, Production, Engineering and Sales. Skills and Qualifications: Wide knowledge of the range of PCB’s and how the chargers work. Schematic layout (OrCad). PCB layout (OrCad). Use More ❯
continually strive for improved quality and maximum efficiency within the Unit Build & CCA manufacturing area. Role will be product focused with a strong involvement in a Functional Test environment. Main Duties: Life cycle ownership fortest costs and efficiency Continually improve existing test solutions through yield analysis, test time reduction, faster diagnostic … of diagnostic technicians & engineers. Enhance customer stewardship, by providing effective solutions to problems and future demands Provide input to design authorities for successful DFM/DFT implementation Provide input to business capture team for bid and proposal purposes Active team member Candidate Requirements: Essential: Minimum of HND/Degree in electronics related subject, preferably … skills Desirable: Ability to communicate at all levels across a range of disciplines Has specified top level production requirements for NPI Specification and communication of DFM/DFT principles Experience of various test platforms/operating systems Has an understanding of ESS Understands the principles of 6 Sigma and Lean Manufacturing Knowledge and experience of SAP and More ❯
At Ouster, we build sensors and tools for engineers, roboticists, and researchers, so they can make the world safer and more efficient. We've transformed LIDAR from an analog device with thousands of components to an elegant digital device powered by one chip-scale laser array and one CMOS sensor. The result is a full range of high … other applications. If you're motivated by solving big problems, we're hiring key roles across the company and need your help! Ouster is seeking a Digital IC Design Engineer to play a critical role in designing and building next-generation, commercial-grade LiDAR systems. The candidate must have a background in digital circuit specification, design … design & verification System)Verilog/VHDL) Close working with analog IC designers and sub-contractors Experience with design synthesis, timing closure & STA is desirable Support DfT strategy & implementation Debug of RTL/gate level simulations/failures to root cause Scripting (Python, Perl, etc.) Collaboration with firmware, hardware, software, analog IC design engineers Prepare More ❯
Are you ready to shape the future of automotive microcontrollers? Are you looking for the next step in your career and want to lead a team focused on innovation and automation? Then, join us as Senior Manager and take the lead in driving the future of semiconductor technology while working in a dynamic, diverse, and collaborative environment. Whether … opportunity to make an impact, inspire a talented team, and contribute to cutting-edge advancements in the automotive microcontroller market. Apply now! Job Description As the Senior Manager for MC IP Infrastructure, Methodology, and Automation, you will play a pivotal role in supporting the development of our microcontroller IP portfolio. You will lead a team of skilled engineers … cross-functional teams and give strong support to our Technical Leads Proficiency in hardware description languages (e.g., VHDL, Verilog) Familiarity with IP development tools and methodologies (e.g., synthesizable RTL, DFT, PPA optimization) Experience with automation frameworks and scripting languages (e.g., Python, Perl) would be an advantage Knowledge of integrated circuit design, pre-silicon verification, and post-silicon validation More ❯
Job Title: Senior Digital Design Engineer Position: Full time permanent position Location: Bristol Salary Range: 50K - 80K GBP per annum depending on experience Client Information: My client is looking to strengthen their ASIC Digital Design team. Looking for bright candidates who have an enthusiasm and aptitude for working with ASIC chips. Designing … chips for customers ranging from start-ups to blue chip companies, in industries including: automotive, medical, space and mobile technology companies. You will have a strong academic record, around 7-10 years' experience in industry working on ASIC developments and IP design. If you have at least one successful project as Technical Lead, a more senior position could … understanding of all aspects of ASIC FE design, from specification to RTL, and with a basic understanding of RTL to tape out flow ASIC implementation skills (synthesis, DFT, timing closure) Experience to lead one complex IP design and/or full ASIC design, from specification to full RTL Specific expertise in the following technical More ❯
pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We're backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford Sciences Innovations, INKEF Capital and Octopus Ventures, and we … theoreticians and software engineers to create a unique, world-leading team, working together closely to maximise our combined expertise. Our collaborative and interdisciplinary culture is an ideal fit for anyone who thrives in a cutting-edge research and development environment focused on tackling big challenges and contributing to the development of scalable quantum computers based on silicon technology. … providing feedback on the validity of the working principles of a circuit without the assistance of simulation software. Understanding of RF testing and demonstrated experience in the application of DFT of RF blocks. Knowledge of one or more industry-standard EM simulation toolset (ADS, EMX, CDT, HFSS) Strong analytical and problem-solving skills with a high-level of self-management More ❯
pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford Sciences Innovations, INKEF Capital and Octopus Ventures, and we … theoreticians and software engineers to create a unique, world-leading team, working together closely to maximise our combined expertise. Our collaborative and interdisciplinary culture is an ideal fit for anyone who thrives in a cutting-edge research and development environment focused on tackling big challenges and contributing to the development of scalable quantum computers based on silicon technology. … providing feedback on the validity of the working principles of a circuit without the assistance of simulation software. Understanding of RF testing and demonstrated experience in the application of DFT of RF blocks. Knowledge of one or more industry-standard EM simulation toolset (ADS, EMX, CDT, HFSS) Strong analytical and problem-solving skills with a high-level of self-management More ❯
Join to apply for the Staff RF IC Design Engineer role at Quantum Motion 1 week ago Be among the first 25 applicants Join to apply for the Staff RF IC Design Engineer role at Quantum Motion Get AI-powered advice on this job and more exclusive features. About The Role And … pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford Sciences Innovations, INKEF Capital and Octopus Ventures, and we … providing feedback on the validity of the working principles of a circuit without the assistance of simulation software. Understanding of RF testing and demonstrated experience in the application of DFT of RF blocks. Knowledge of one or more industry-standard EM simulation toolset (ADS, EMX, CDT, HFSS) Strong analytical and problem-solving skills with a high-level of self-management More ❯
Swindon, Wiltshire, United Kingdom Hybrid / WFH Options
Renesas Electronics Corporation
Job Description As a Digital Design Engineer, you will be responsible for the digital design and RTL coding using Verilog or System Verilog. Integrating modules at SoC and work hands-on in the development cycle, especially in frontend domain until tapeout, this includes RTL coding, CDC, Lint, synthesis, STA, DFT. Debug and fix functional … issues in RTL and develop scripts to automate frequently used processes. You will be expected to validate all the digital design functionality on silicon and debug and find innovative solutions. Qualifications MS or above in Electronics or Electrical Engineering with focus on digital IC design. Experience with a full design cycle from architecture to place and … and a quick learner with good communication skills. Good in scripting using TCL, Perl. Comfortable with Unix, Linux environment. Exposure to the industry standard tools in VLSI digital design will be preferred. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and More ❯
DFT Technical Lead - Digital & SoC Design (CDI) Location: Paris, Caen, or Remote in France Salary: Up to €110,000 Gross per annum + company benefits Join an innovative global semiconductor specialist in high-performance mixed-signal and digital ASICs. They focus on delivering custom system-on-chip (SoC) and transceiver solutions to clients in communications and industrial sectors … leading in advanced technology nodes and silicon-proven design excellence. As a DFT (DesignforTest) Technical Leader , you will oversee the design and implementation of DFT architecture for complex SoCs developed in advanced CMOS nodes. You will collaborate with RTL design, physical implementation, and industrialization teams … to ensure efficient testability and high production yield. You will drive test strategies, implement best-in-class DFT flows, and contribute to delivering state-of-the-art transceiver ASICs for various markets. Your responsibilities: Define and drive DFT architecture and implementation for complex SoCs in advanced (sub-20nm) CMOS technologies. Develop and maintain DFT insertion More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Agile Analog Ltd
Digital Design Engineer Agile Analog is revolutionising the way Analog circuits are designed. We are developing a process agnostic design methodology that uses automation to accelerate the generation of circuits and IP for our customers. Using our innovative technology, we have the capability to design circuits faster, to a higher quality and … physical abstraction of standard cells/IP Knowledge of UPF/CPF for low-power intent specification and implementation DesignforTest (DFT) Experience in implementing DFT techniques , including: Scan insertion , scan chain stitching , and test point insertion Built-in Self-Test (BIST) for logic and memory Integration of … Automatic Test Pattern Generation (ATPG) and analyzing test coverage reports Understanding of DFT constraints and impact on design timing and area Tools & Workflow Automation Experienced with industry-standard EDA tools : Synopsys, Cadence, Siemens/Mentor, Xilinx, Intel Proficient in version control systems such as Git for collaborative development Skilled in scripting and workflow automation More ❯
Senior/Principal Physical Design Engineer London - Hybrid Fractile’s mission is to enable a new chapter in the AI revolution. We’re pioneering AI innovation where hardware and software join to create something extraordinary, unlocking the power of the world’s largest language models with speed increases of x100. Our team is rapidly expanding, and we're … searching for visionary engineers, scientists, and thinkers who share our passion for pushing boundaries and redefining what's possible. If you're ready to join a dynamic group of innovators shaping AI's future, we want to hear from you! We are seeking a highly skilled Senior/Principal Physical Design Engineer to contribute … addressing IR drop, electromigration, and low-power design techniques. Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance. Collaborate with DFT engineers to integrate design-for-test (DFT) structures into the physical implementation. Develop flows in EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Graphics More ❯
Job Title: Hardware Design and Verification Engineer Position: Junior - Mid level Engineers Type: Contract or Permanent Location: Hertfordshire Hybrid Salary Range: Negotiable Client Information: We are building a revolutionary RISC-V-based GPU and AI platform, and we're hiring talented engineers in Hardware Design and Hardware Verification to join us on this mission. If you … thrive on innovation and want to work on cutting-edge vector processing and neural compute technologies, this is your opportunity. Design Responsibilities: Architect and implement RTL for critical blocks within our RISC-V vector core GPU Design high-performance, power-efficient compute units for graphics and AI workloads Optimize microarchitecture to meet … accelerator design Familiarity with RISC-V instruction set architecture (preferred) Understanding of graphics pipelines and/or neural network accelerators Awareness of physical design implications (DFT, timing, floorplanning) Proficiency with EDA tools (Synopsys, Cadence, Mentor, etc.) Strong scripting skills in Python, TCL, or similar BS/MS in Electrical Engineering, Computer Engineering, or related field Verification More ❯
Bristol, Gloucestershire, United Kingdom Hybrid / WFH Options
Arm Limited
of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. Working with project management and leads on planning tasks … in one or more of various verification methodologies - UVM/OVM, formal, power aware verification, emulation Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support Good Problem Solving and Debugging skills. "Nice To Have" Skills and Experience … Knowledge of SoC Verification Flow and strategy. Experience with ARM-based designs and/or ARM System Architectures. Porting peripheral driver software Clock Domain Crossing verification Experienced in GLS, DFT/DFD, Power Aware verification techniques Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet More ❯
Job Description Summary We are seeking a Manufacturing Test Engineer to take responsibility for assessing and maintaining testing processes and equipment to ensure the safe operation, quality, and functionality of products within our manufacturing operations. In this role, you will analyze test equipment performance and conduct capacity studies to ensure solutions meet all production requirements. You … will work collaboratively with design, production, and quality teams to ensure that test systems and associated equipment entering production are fit for purpose and have undergone the necessary First Time Right (FTR) checks. If you are driven by excellence and eager to contribute to the success of a dynamic manufacturing environment, we encourage you to … in line with S&OP demands FTR planning and execution for new test equipment and associated hardware TPM definition and deployment to production and response teams DFT guidance generation Required Qualifications: Strong knowledge of testing methodologies, tools, and equipment. Proficiency in data analysis and statistical tools. Familiarity with lean manufacturing principles (e.g., Kaizen, Six Sigma). Excellent More ❯
pension, shares scheme & healthcare scheme Are you looking for a role that can offer you long-term stability, and an opportunity to develop your career? As Production Test Engineer, you would be working in a relaxed engineering environment, working as part of a small production team, testing interesting electro-mechanical equipment. It s a clean environment, and … they are now looking to add to their team due to retirement later this year. The Production Test Engineer will work closely with the Production and R&D teams. They have products with well developed test procedures as well as prototype stage products. You will be developing the test specification, electronically and optically testing PCBAs. Your voice … You will also be responsible for the following: Electronically and functionally testing all Products and PCBAs Working with subcontract manufacturing partners Updating all existing Product and PCBA test procedures and specifications Diagnose, fault find, and repair any Products or PCBAs that have failed the test Liaising with R&D on all DesignforMore ❯
How often do you get the chance to build a technology that transforms the future of humanity? Graphcore products have set the standard in made-for-AI compute hardware and software, gaining global attention and industry acclaim. Now we are developing the next generation of artificial intelligence compute with systems that will allow AI researchers to develop more … designs, our flows, our methodologies, our infrastructure. The Team The physical design team sits within the wider silicon design team which includes RTL, verification and DFT and with whom we collaborate extensively. Our work additionally involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create … PCIe, LPDDR, HBM interfaces Power integrity and optimization 2nm or 3nm technologies Chip finishing (pad rings, chip level LVS/DRC/ERC) Designfortest Team management Project Planning In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan More ❯
An exciting role has become available in our Test Architect team as a Technical expert involved in all aspects of the Missile Test process. If you have experience Electronic circuit design, testing and failure analysis techniques along with Test equipment design then this could be just the role for you! Salary … paternity leave, neonatal leave and fertility testing and treatments Facilities : Fantastic site facilities including subsidised meals, free car parking and much more The opportunity: As the Missile Test and Testability Expert you will be reporting in to the Test and Testability Department Head and, from a Project perspective, into the Project Chief Design Engineer. … and planning. Provide technical leadership to all Test related issues across design projects with proven experience in Test Equipment requirements capture and specification. Experience in DfT and testability Proven ability to influence senior stakeholders within the business relating to technical direction Support departmental strategy and support the department head with recruitment of the right people into More ❯