Experience designing FPGA/CPLDs based electronic products in a commercial environment - Experience in FPGA design from multiple vendors (Xilinx, Altera, Microsemi/Lattice, Achronix, Atmel, e2v) - Ability to embed processors into FPGA designs - Experience proving design concepts by simulating environments - Experience exploring and developing new technologies and More ❯
Experience designing FPGA/CPLDs based electronic products in a commercial environment - Experience in FPGA design from multiple vendors (Xilinx, Altera, Microsemi/Lattice, Achronix, Atmel, e2v) - Ability to embed processors into FPGA designs - Experience proving design concepts by simulating environments - Experience exploring and developing new technologies and More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
wakefield, yorkshire and the humber, United Kingdom
Akkodis
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
IEC 62443, ISO 26262 Required Experience Experience of developing RTL design for digital electronics systems for Xilinx device architectures (or AMD/Lattice) using VHDL Experience in FPGA-SoC-implementation of algorithms developed in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/ More ❯
