1 to 25 of 60 Permanent SystemVerilog Jobs in the UK

to flight qualification. Key Skills & Experience Essential: Degree in Electronic/Electrical/Computer Engineering (or equivalent) Strong experience in digital design with VHDL and/or Verilog/SystemVerilog Proven track record performing synthesis, timing closure, and static timing analysis Experience with FPGA tool flows (e.g. Xilinx Vivado, Intel/Altera tools, or similar) Familiarity with simulation/verification More ❯

in design reviews and contribute to system architecture and documentation. Skills & Experience Field Programmable Gate Arrays and digital signal processing Proven experience in FPGA design (VHDL/Verilog/SystemVerilog). Strong background in DSP implementation and digital transceiver design. Solid understanding of digital and RF hardware principles. Familiarity with AXI bus architectures and software-controlled FPGA IP. Competent in More ❯

in design reviews and contribute to system architecture and documentation. Skills & Experience Field Programmable Gate Arrays and digital signal processing Proven experience in FPGA design (VHDL/Verilog/SystemVerilog). Strong background in DSP implementation and digital transceiver design. Solid understanding of digital and RF hardware principles. Familiarity with AXI bus architectures and software-controlled FPGA IP. Competent in More ❯

signal processing applications Contribute to architecture decisions, documentation, and technical reviews Collaborate across disciplines (design, verification, algorithms, implementation, system integration) Key Skills & Experience Essential: Expert knowledge of RTL (Verilog, SystemVerilog) for FPGA/ASIC products Strong track record delivering FPGA/ASIC digital designs Experience with synthesis, static timing analysis, power optimisation, and high-throughput design Proficiency with industry-standard More ❯

and skills Bachelor’s or Master’s degree in Electronic Engineering (or related field) Experience in digital ASIC design and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity More ❯

Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for dynamic More ❯

Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for dynamic More ❯

Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for dynamic More ❯

Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for dynamic More ❯

Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for dynamic More ❯

Engineer: Holds a degree in Electrical/Electronic Engineering or a related field. Brings 3+ years of hands-on experience in RTL design and verification for FPGAs, mastering Verilog, SystemVerilog, or VHDL. Proficient in FPGA toolchains, especially with Xilinx Vivado (preferred) or Intel Quartus. Skilled in simulation environments, preferably with expertise in Modelsim/Questa. Proficient in Python for dynamic More ❯

blocks, contributing to the development of high-performance, low-power digital hardware for advanced communication systems and signal processing applications. Key Responsibilities Design and implement efficient RTL (VHDL/SystemVerilog) for DSP algorithms such as filters, transforms, and modulators. Collaborate with algorithm and architecture teams to translate high-level DSP models into optimized hardware implementations. Develop and refine custom digital More ❯

engineering experience (implementation, simulation, verification and test) Strong background in Digital Signal Processing (DSP) design and optimisation Excellent academic background with a degree from a top university Proficiency in SystemVerilog or VHDL Experience with high-speed external interfaces (e.g. PCIe, Aurora, Ethernet, SPI) Proven ability to take technical ownership, collaborate effectively, and deliver complex projects Position: Senior FPGA Engineer Location More ❯

will deliver high-speed compute infrastructure integrated directly into trading, research, and networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co More ❯

will deliver high-speed compute infrastructure integrated directly into trading, research, and networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co More ❯

will deliver high-speed compute infrastructure integrated directly into trading, research, and networking pipelines. What You'll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co More ❯

will deliver high-speed compute infrastructure integrated directly into trading, research, and networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co More ❯

will deliver high-speed compute infrastructure integrated directly into trading, research, and networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co More ❯

will deliver high-speed compute infrastructure integrated directly into trading, research, and networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams (ASIC, software, infra) to co More ❯

as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages – Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation (TRMs, register More ❯

as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages - Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation (TRMs, register More ❯

as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages – Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation (TRMs, register More ❯

Electrical or Computer Engineering (or related discipline). Proven experience in digital IC design, ideally within AI accelerators, NPUs, GPUs, or high-performance ASICs. Strong RTL design skills using SystemVerilog/Verilog and familiarity with EDA tools for simulation, synthesis, and timing analysis. Knowledge of low-power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. More ❯

of next-generation satellite communications, with significant scope to influence both product direction and engineering methodology. What theyre looking for: Extensive experience developing complex digital designs in Verilog or SystemVerilog Strong track record delivering high-throughput FPGA or ASIC IP, ideally in signal processing or comms applications Expertise in simulation, synthesis, timing optimisation, and lab-based validation Proficiency with industry More ❯

next-generation satellite communications, with significant scope to influence both product direction and engineering methodology. What they’re looking for: Extensive experience developing complex digital designs in Verilog or SystemVerilog Strong track record delivering high-throughput FPGA or ASIC IP, ideally in signal processing or comms applications Expertise in simulation, synthesis, timing optimisation, and lab-based validation Proficiency with industry More ❯