Senior Verification Engineer
- Hiring Organisation
- Intellectual Capital Resources
- Location
- Cambridge, Cambridgeshire, UK
- Employment Type
- Full-time
write functional coverage and SVA Good understanding of design/front-end processes Experience with low-power simulations SoC verification concepts: memory caches, DMA, security architecture (TrustZone or equivalent). Experience of Cadence simulation tool flow including gate-level simulation. Scripting languages: Bash, TCL, Make, YAML, etc. Please ...