1 to 25 of 31 Permanent Senior Verification Engineer Jobs

Senior Verification Engineer - Ghent I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs … Skills & Experience Master's degree in a relevant field. Proven experience in 3 successful tapeouts Expertise in UVM/System Verilog Experience with Formal Verification Experience with scripting languages such as Python, Perl or Bash Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential … This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome. Email - Tel - LinkedIn More ❯

Senior Chip-Design Verification Engineer, Networking Chip Design page is loaded Senior Chip-Design Verification Engineer, Networking Chip Design Apply locations UK, Belfast time type Full time posted on Posted 2 Days Ago job requisition id JR NVIDIA is looking for a Senior Verification Engineer to join our Networking Chip Design team in Belfast, focusing on products such as our ConnectX Ethernet Network Interface Cards (SmartNICs) and BlueField Data Processing Units (DPUs), which are revolutionising today's Data Centre. As a Senior Chip-Design Verification Engineer, you … speed communication and data processing devices, delivering the highest throughput and lowest latency. What you'll be doing: Work in a combined design and verification team which develops core units within the Network Adapter and BlueField SoC (System-on-Chip) silicon teams Use advanced verification methodologies like e More ❯

Senior ASIC Verification Engineer AI Semiconductor Start-up Amsterdam, NL A fast-growing Semiconductor scale-up are looking for an experienced ASIC Verification Engineer to join their team, and help define the next generation of security-focused CPU Chips. As a UVM Verification Engineer, you will play a key role in ensuring the quality and reliability of our cutting-edge products. Leveraging your extensive experience with Universal Verification Methodology (UVM) and verification techniques, you will contribute to the development of robust verification environments and methodologies. You will collaborate closely with … teams including design, architecture, and software engineering to deliver high-quality solutions that meet or exceed customer expectations. Responsibilities Develop and maintain UVM-based verification environments for complex digital designs. Create comprehensive verification plans and test cases based on design specifications. Implement and execute test benches to verify More ❯

in a wide variety of sectors that keep our nation and our allies safe from undersea to space and cyberspace. We are seeking digital verification engineers for our development of full-custom digital and mixed signal circuits. Must be proficient in HDL (VHDL/Verilog) and HVL (SystemVerilog). … Experience with SystemVerilog Assertions (SVA) and Universal Verification Methodology (UVM) is required. Successful candidates will have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard interfaces. Experience with object-oriented programming languages and concepts is also required. Must have … This position can be filled at the Principal level OR the Sr. Principal level. Qualifications for both are listed below: Basic Qualifications Principal Digital Verification Engineer: Bachelor's degree in a technical area (BSEE or other Engineering discipline preferred) with 5 years of relevant experience (3 years with More ❯

is impossible. Our employees are not only part of history, they're making history. Explore a career engineering what's possible as a Digital Verification Engineer in San Diego, CA. What You'll Get to Do: Our Advanced Digital Engineering organization creates the next generation of communications and … life in our San Diego labs and have on-site advanced manufacturing just minutes from the beach Southern California is famous. As a Digital Verification Engineer at Northrop Grumman, you will have an opportunity to be a part of an organization that is collaborative, open, transparent, and team … possible? If you have hands-on experience in FPGA Development with VHDL, apply today. Roles and Responsibilities: Scope of responsibility also includes simulation and verification of FPGA/CPLD designs, requirements, and system validation Candidate is required to have knowledge of modern digital design and verification concepts Communicate More ❯

and embedded software engineers to produce a fully verified, trusted and performant solution. With full visibility of the entire stack, you will own everything verification related. As a Senior Verification Engineer at Riverlane, you will: Proactively work with designers and architects to define verification plans … Implement scalable testbenches, including checkers, reference models and coverage groups in SystemVerilog. You will implement self-testing, directed and random tests. Maintain the design verification environment, keeping track of regression, coverage metrics and bugs. You do not need a background in quantum computing! You will learn this along the … way Requirements What we need Demonstrable commercial experience in functional verification, including ownership of verification planning and strategy. A proactive and collaborative person who actively shares feedback and who can independently define the scope of work. Proven experience of testbench design with verification frameworks like UVM/ More ❯

ASIC Verification Engineer A fantastic opportunity for an experienced ASIC Verification Engineer to join a fast-scaling Semiconductor manufacturer based in Amsterdam, Netherlands. Leveraging your extensive experience with Universal Verification Methodology (UVM) and verification techniques, you will contribute to the development of robust verification … teams including design, architecture, and software engineering to deliver high-quality solutions that meet or exceed customer expectations. Responsibilities - Develop and maintain UVM-based verification environments for complex digital designs. - Create comprehensive verification plans and test cases based on design specifications. - Implement and execute test benches to verify … performance, and compliance with specifications. - Debug issues and work closely with design engineers to resolve them in a timely manner. - Drive continuous improvement of verification methodologies, processes, and best practices. - Mentor junior team members and provide technical guidance as needed. - Collaborate with other teams to ensure alignment of verification More ❯

revolution developing IC that has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Senior Verification Engineer Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification … resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively More ❯

Huawei talent, offering full technical freedom, rare foundry access, and long-term stability in a low-politics, high-impact environment. They're hiring a Senior Verification Engineer to help build their verification infrastructure. Responsibilities Implement verification infrastructure and test cases in collaboration with the design … partners. Debug failures, create and track issues to resolution. Develop and maintain automated regression test infrastructure and gatekeepers. Requirements Deep expertise in industry-standard verification methodologies, including proficiency with SystemVerilog and UVM. Experience with GPUs/CPUs is highly desirable. Demonstrated ability to collaborate effectively with design teams to More ❯

Huawei talent, offering full technical freedom, rare foundry access, and long-term stability in a low-politics, high-impact environment. They're hiring a Senior Verification Engineer to help build their verification infrastructure. Responsibilities Implement verification infrastructure and test cases in collaboration with the design … partners. Debug failures, create and track issues to resolution. Develop and maintain automated regression test infrastructure and gatekeepers. Requirements Deep expertise in industry-standard verification methodologies, including proficiency with SystemVerilog and UVM. Experience with GPUs/CPUs is highly desirable. Demonstrated ability to collaborate effectively with design teams to More ❯

competitive advantage by empowering their system-on-chip developers to build the most innovative products. What you'll do We're looking for passionate Senior Verification Engineers to help bring our vision to life. You'll be a key part of verifying complex, state-of-the-art CPUs … including advanced out-of-order processors. Taking ownership of portions of the design, you'll apply a range of verification methodologies and play a vital role in setting high standards for a brand-new platform. This is a unique chance to work on clean-sheet designs that push technological … or Bristol and be part of a team redefining what's possible in CPU design. You will: Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Collaborate with other engineers in a team responsible for the delivery of More ❯

Social network you want to login/join with: Senior Design Verification Engineer, slough col-narrow-left Client: Platform Recruitment Location: slough, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 4 Posted: 31.05.2025 Expiry Date: 15.07.2025 col-wide Job Description … has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. … resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively More ❯

Social network you want to login/join with: Senior Design Verification Engineer, brighton col-narrow-left Client: Platform Recruitment Location: brighton, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 4 Posted: 31.05.2025 Expiry Date: 15.07.2025 col-wide Job Description … has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. … resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively More ❯

Social network you want to login/join with: Senior Design Verification Engineer, west london col-narrow-left Client: Platform Recruitment Location: west london, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 10 Posted: 06.06.2025 Expiry Date: 21.07.2025 col-wide … has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. … resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively More ❯

Social network you want to login/join with: Senior Design Verification Engineer, crawley, west sussex col-narrow-left Client: Platform Recruitment Location: crawley, west sussex, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 9 Posted: 06.06.2025 Expiry Date: 21.07.2025 … has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. … resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively More ❯

Social network you want to login/join with: Senior Design Verification Engineer, south west london col-narrow-left Client: Platform Recruitment Location: south west london, United Kingdom Job Category: Other - EU work permit required: Yes col-narrow-right Job Views: 4 Posted: 31.05.2025 Expiry Date: 15.07.2025 … has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. … resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively More ❯

Our Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded … such as SysML, knowledge in MATLAB/Simulink. • Experience in integrating descriptive modeling tools with other simulation tools. Additional Job Description: You will develop verification approaches, author and execute verification plans, and use formal analysis tools. You will work in multi-disciplinary teams with opportunities to learn, grow … and contribute to a variety of projects. Join us as we develop the next generation of digital and embedded hardware platforms. • Develop verification and test plans • Develop UVM Agents for proprietary buses • Instantiate VIPs for industry standard buses • Work in both block-level/chip-level UVM testbench environment More ❯

Staff GPU Verification Engineer UK - Hybrid - Bristol, Cambridge or Kings Langley Up to £90,000 + Annual Bonus Permanent Are you committed to developing cutting-edge devices, and building your own expertise in verification? With this role, you get a unique opportunity to exercise hardware verification … Hardware department. You can apply your abilities to essential aspects that meet the most recent requirements and advancements, and be influential in bringing new verification methodologies to the table. Key skills required for this role: A solid experience in developing verification environments for RTL designs Knowledge of SystemVerilog … UVM An ability to develop new verification flows You will be involved in the execution of all verification efforts of a component or sub-system, from the planning stage to sign-off. This will include creating verification plans, and development/maintenance of testbench components. Interested? Apply More ❯

are looking for candidates who are currently based in Europe and are open to working remotely.) Job Overview: We are seeking a proficient SoC Verification Engineer with a strong background in ARM-based system designs and verification methodologies. The ideal candidate will be experienced in verifying complex … SoC architectures, utilizing languages such as C, System Verilog (SV), and Universal Verification Methodology (UVM). This role involves close collaboration with design teams to ensure that all aspects of the SoC are thoroughly validated, from architectural design to implementation. The candidate will also contribute to the development of … verification plans, testbenches, and methodologies to enhance overall product quality. Key Responsibilities: Develop and implement verification testbenches and components for ARM-based SoC designs. Execute thorough verification processes, including the development of test plans and test cases using C, SV, and UVM. Collaborate closely with design teams More ❯

we drive innovation into all areas where computing is possible, helping to build better solutions for the billions of people using our technology worldwide. Verification engineers in the GPU Group play a critical role in developing next-generation GPU IP for graphics and compute. We are looking for passionate … and skilled verification engineers who are capable of taking ownership of verification environments for future-generation hardware IP. In this role, you will contribute to all phases of the verification flow, ensuring high-quality and on-time delivery. Required Skills and Experience: Exposure to all stages of … unit verification, including collecting requirements, defining test methodologies, writing test plans, developing testbenches and test cases, and driving verification closure. Strong hands-on experience in System Verilog and UVM methodology, with a solid background in Object-Oriented programming. Proven ability to debug complex designs and verification environments. More ❯

Position: GPU Formal Verification Engineer Contract: Permanent Salary: Negotiable + 20% variable The role: The role is for our fast-growing GPU Hardware team. Our mission is to create through constant innovation the best-in-class GPU IP, for a wide range of market segments and applications. By … market-leading chips and deliver significant impact to the future success of our wider team. You will: Be responsible for the delivery of formal verification activities related to a GPU component or sub-system from early stages of verification planning to sign-off. Design and implement formal verification strategies to achieve our design quality goals. Root-cause design issues in collaboration with other engineers. Research new formal verification techniques and continuously drive the scope of what can be achieved with formal verification. Create verification plans, develop and maintain formal methodology and complex benches. Track and More ❯

and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. … You Are: You are a highly motivated senior engineer with a passion for Digital Design Verification. With an in-depth understanding of verification flows, test plans, and strategies, you thrive on ensuring that designs comply with protocol standards and system requirements. You are experienced in creating and … a degree in Computer Engineering or Electrical Engineering, you are ready to take on this significant individual contributor role and potentially grow into a Verification Lead position. What You'll Be Doing: Collaborating with customers to confirm that designs comply with protocol standards and system requirements before they are More ❯

We are hiring for three exciting hardware verification roles in the UK with hybrid flexibility and strong growth potential. Join a fast-growing start-up working on next-gen silicon IP across AI, graphics, compute, and security. You will contribute to cutting-edge ASIC verification and play a … shaping high-performance chips. If you are looking for real impact and innovation, or know someone who might be, please get in touch. 1. Verification Lead (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Leadership role managing SoC/IP-level verification Requirements: 6+ years’ experience, strong SystemVerilog …/UVM, team mentorship 2. Hardware Verification Engineer (Permanent/Contract) Location: Hemel Hempstead, UK (Hybrid Preferred | Remote Considered) Type: Contract (Outside IR35) Focus: RISC-V, GPU, AI, complex SoCs Requirements: 5+ years’ experience, SystemVerilog/UVM, scripting 3. Junior/Mid-Level Verification Engineer (Permanent More ❯

We are hiring for three exciting hardware verification roles in the UK with hybrid flexibility and strong growth potential. Join a fast-growing start-up working on next-gen silicon IP across AI, graphics, compute, and security. You will contribute to cutting-edge ASIC verification and play a … shaping high-performance chips. If you are looking for real impact and innovation, or know someone who might be, please get in touch. 1. Verification Lead (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Leadership role managing SoC/IP-level verification Requirements: 6+ years’ experience, strong SystemVerilog …/UVM, team mentorship 2. Hardware Verification Engineer (Permanent/Contract) Location: Hemel Hempstead, UK (Hybrid Preferred | Remote Considered) Type: Contract (Outside IR35) Focus: RISC-V, GPU, AI, complex SoCs Requirements: 5+ years’ experience, SystemVerilog/UVM, scripting 3. Junior/Mid-Level Verification Engineer (Permanent More ❯

We are hiring for three exciting hardware verification roles in the UK with hybrid flexibility and strong growth potential. Join a fast-growing start-up working on next-gen silicon IP across AI, graphics, compute, and security. You will contribute to cutting-edge ASIC verification and play a … shaping high-performance chips. If you are looking for real impact and innovation, or know someone who might be, please get in touch. 1. Verification Lead (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Leadership role managing SoC/IP-level verification Requirements: 6+ years experience, strong SystemVerilog …/UVM, team mentorship 2. Hardware Verification Engineer (Permanent/Contract) Location: Hemel Hempstead, UK (Hybrid Preferred | Remote Considered) Type: Contract (Outside IR35) Focus: RISC-V, GPU, AI, complex SoCs Requirements: 5+ years experience, SystemVerilog/UVM, scripting 3. Junior/Mid-Level Verification Engineer (Permanent More ❯