Our Digital Design Team is seeking a motivated and experienced Senior UVM Digital VerificationEngineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job … in use of MBSE tools such as SysML, knowledge in MATLAB/Simulink. • Experience in integrating descriptive modeling tools with other simulation tools. Additional Job Description: You will develop verification approaches, author and execute verification plans, and use formal analysis tools. You will work in multi-disciplinary teams with opportunities to learn, grow and contribute to a variety … of projects. Join us as we develop the next generation of digital and embedded hardware platforms. • Develop verification and test plans • Develop UVM Agents for proprietary buses • Instantiate VIPs for industry standard buses • Work in both block-level/chip-level UVM testbench environment • Work with RTL designers to resolve simulation issues • Implement cover groups according to design requirements More ❯
Our company is pioneering capabilities in a wide variety of sectors that keep our nation and our allies safe from undersea to space and cyberspace. We are seeking digital verification engineers for our development of full-custom digital and mixed signal circuits. Must be proficient in HDL (VHDL/Verilog) and HVL (SystemVerilog). Experience with SystemVerilog Assertions (SVA … and Universal Verification Methodology (UVM) is required. Successful candidates will have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard interfaces. Experience with object-oriented programming languages and concepts is also required. Must have strong written and oral communication skills. The Northrop Grumman Mission Systems (NGMS) pushes the boundaries … MD OR Annapolis Junction, MD This position can be filled at the Principal level OR the Sr. Principal level. Qualifications for both are listed below: Basic Qualifications Principal Digital VerificationEngineer: Bachelor's degree in a technical area (BSEE or other Engineering discipline preferred) with 5 years of relevant experience (3 years with technical MS; 0 years with More ❯
Nordic Semiconductor as we continue our journey towards high ambitions with dedicated colleagues worldwide. The Wi-Fi IC Group is looking to strengthen our team with experienced and talented verification engineers. This role involves the development of Wi-Fi microcontrollers, SoC/IP subsystem verification planning, test infrastructure development, and functional verification. The ideal candidate will have strong … knowledge of verification planning, assertion-based and formal verification techniques, and experience with low power and SoC-level verification. Proficiency in low-level and script-based languages, along with fluent English skills, are required. We seek an analytical, quality-oriented, self-starter with excellent interpersonal and communication skills. Key responsibilities Develop Wi-Fi products, including microcontrollers and connectivity … solutions Plan verification for SoC/IP subsystems, develop test infrastructure, and perform functional verification Create test benches and test cases using Verilog, SystemVerilog, UVM, C, Formal Write embedded C code or CPU-centric tests using C Define, implement, and analyze coverage Key qualifications MSc in electrical engineering or equivalent, or Bachelor's with industrial experience Strong knowledge More ❯
fast-paced environment using state-of-the-art tools and methodologies, all the while increasing your knowledge, growing your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification environments. Candidates will be given the opportunity to lead teams, mentor junior engineers, and contribute … to the evolution of the company's verification processes and methodologies. While in this job you will Plan, architect, develop, and use configurable, self-checking testbenches implemented in SystemVerilog/UVM and/or VHDL; Develop constrained-random, metric-driven test plans and strategies to verify FPGAs performing signal processing and control functions in Electronic Warfare systems; Collect and … analyze coverage metrics, then use that information to improve the effectiveness of testcases; Enhance your leadership skills while leading small to medium sized DV teams Create reusable Verification IP to be shared across the organization; Drive changes to our process and methodologies. Enhance your DV skills as well as your knowledge of Electronic Warfare while working with subject matter More ❯
by ex-Apple, ARM and Huawei talent, offering full technical freedom, rare foundry access, and long-term stability in a low-politics, high-impact environment. They're hiring a SeniorVerificationEngineer to help build their verification infrastructure. Responsibilities Implement verification infrastructure and test cases in collaboration with the design team and external partners. Debug … failures, create and track issues to resolution. Develop and maintain automated regression test infrastructure and gatekeepers. Requirements Deep expertise in industry-standard verification methodologies, including proficiency with SystemVerilog and UVM. Experience with GPUs/CPUs is highly desirable. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you'd like more information, apply below More ❯
by ex-Apple, ARM and Huawei talent, offering full technical freedom, rare foundry access, and long-term stability in a low-politics, high-impact environment. They're hiring a SeniorVerificationEngineer to help build their verification infrastructure. Responsibilities Implement verification infrastructure and test cases in collaboration with the design team and external partners. Debug … failures, create and track issues to resolution. Develop and maintain automated regression test infrastructure and gatekeepers. Requirements Deep expertise in industry-standard verification methodologies, including proficiency with SystemVerilog and UVM. Experience with GPUs/CPUs is highly desirable. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you'd like more information, apply below More ❯
forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. SeniorVerificationEngineer Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to … report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively with design teams and external More ❯
Senior ASIC VerificationEngineer AI Semiconductor Start-up Amsterdam, NL A fast-growing Semiconductor scale-up are looking for an experienced ASIC VerificationEngineer to join their team, and help define the next generation of security-focused CPU Chips. As a UVM VerificationEngineer, you will play a key role in ensuring the … quality and reliability of our cutting-edge products. Leveraging your extensive experience with Universal Verification Methodology (UVM) and verification techniques, you will contribute to the development of robust verification environments and methodologies. You will collaborate closely with cross-functional teams including design, architecture, and software engineering to deliver high-quality solutions that meet or exceed customer expectations. … Responsibilities Develop and maintain UVM-based verification environments for complex digital designs. Create comprehensive verification plans and test cases based on design specifications. Implement and execute test benches to verify functionality, performance, and compliance with specifications. Debug issues and work closely with design engineers to resolve them in a timely manner. Drive continuous improvement of verification methodologies More ❯
that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us. Boeing Defense, Space and Security (BDS) has an exciting opportunity for a Verification Lead, Senior Systems Engineer , on the Air Dominance\Phantom Works, Air Proprietary 1 (AP1) Program. In this position you will work across numerous engineering fields and internal … and external partners to develop, coordinate, and drive Verification top-down and bottoms-up for the entire Weapon System. The selected candidate will embrace the Model Based Systems Engineering (MBSE) and Digital Engineering strategy to lead a cross functional team to establish and execute an integrated Weapon System verification and certification program. Your leadership in modern/digital … verification techniques will make a difference and accelerate Boeing into the future! This position will directly report to the AP1 System Engineering Integration Team (SEIT) Director and be a valued technical member of the AP1 SEIT leadership team. You will interact regularly with senior leadership to include the AP1 Chief Engineer, subject matter experts on the product More ❯
that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us. Boeing Defense, Space and Security (BDS) has an exciting opportunity for a Verification Lead, Senior Systems Engineer , on the Air Dominance\Phantom Works, Air Proprietary 1 (AP1) Program. In this position you will work across numerous engineering fields and internal … and external partners to develop, coordinate, and drive Verification top-down and bottoms-up for the entire Weapon System. The selected candidate will embrace the Model Based Systems Engineering (MBSE) and Digital Engineering strategy to lead a cross functional team to establish and execute an integrated Weapon System verification and certification program. Your leadership in modern/digital … verification techniques will make a difference and accelerate Boeing into the future! This position will directly report to the AP1 System Engineering Integration Team (SEIT) Director and be a valued technical member of the AP1 SEIT leadership team. You will interact regularly with senior leadership to include the AP1 Chief Engineer, subject matter experts on the product More ❯
talented team of hardware designers and embedded software engineers to produce a fully verified, trusted and performant solution. With full visibility of the entire stack, you will own everything verification related. As a SeniorVerificationEngineer at Riverlane, you will: Proactively work with designers and architects to define verification plans based on design specifications. You … different blocks and system level. Implement scalable testbenches, including checkers, reference models and coverage groups in SystemVerilog. You will implement self-testing, directed and random tests. Maintain the design verification environment, keeping track of regression, coverage metrics and bugs. You do not need a background in quantum computing! You will learn this along the way Requirements What we need … Demonstrable commercial experience in functional verification, including ownership of verification planning and strategy. A proactive and collaborative person who actively shares feedback and who can independently define the scope of work. Proven experience of testbench design with verification frameworks like UVM/OVM. Knowledge of SystemVerilog assertion (SVA). Exposure to different programming languages, such as C More ❯
give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. What you'll do We're looking for passionate SeniorVerification Engineers to help bring our vision to life. You'll be a key part of verifying complex, state-of-the-art CPUs, including advanced out-of-order … processors. Taking ownership of portions of the design, you'll apply a range of verification methodologies and play a vital role in setting high standards for a brand-new platform. This is a unique chance to work on clean-sheet designs that push technological boundaries and make a real impact. Join us in Cambridge or Bristol and be part … of a team redefining what's possible in CPU design. You will: Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Collaborate with other engineers in a team responsible for the delivery of all verification activities related to a component or subsystem from start to finish Define More ❯
SeniorVerificationEngineer - Ghent I am seeking a highly experienced SeniorVerificationEngineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other … advanced technologies. Required Skills & Experience Master's degree in a relevant field. Proven experience in 3 successful tapeouts Expertise in UVM/System Verilog Experience with Formal Verification Experience with scripting languages such as Python, Perl or Bash Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential This SeniorVerificationEngineerMore ❯
Senior Chip-Design VerificationEngineer, Networking Chip Design page is loaded Senior Chip-Design VerificationEngineer, Networking Chip Design Apply locations UK, Belfast time type Full time posted on Posted 2 Days Ago job requisition id JR NVIDIA is looking for a SeniorVerificationEngineer to join our Networking Chip Design … in Belfast, focusing on products such as our ConnectX Ethernet Network Interface Cards (SmartNICs) and BlueField Data Processing Units (DPUs), which are revolutionising today's Data Centre. As a Senior Chip-Design VerificationEngineer, you will join a group of passionate engineers to design and implement the next generation state-of-the-art SmartNIC and DPU platforms. … the industry's best high-speed communication and data processing devices, delivering the highest throughput and lowest latency. What you'll be doing: Work in a combined design and verification team which develops core units within the Network Adapter and BlueField SoC (System-on-Chip) silicon teams Use advanced verification methodologies like e/Specman and SystemVerilog/ More ❯
ASIC VerificationEngineer A fantastic opportunity for an experienced ASIC VerificationEngineer to join a fast-scaling Semiconductor manufacturer based in Amsterdam, Netherlands. Leveraging your extensive experience with Universal Verification Methodology (UVM) and verification techniques, you will contribute to the development of robust verification environments and methodologies. Collaborating closely with cross-functional teams … including design, architecture, and software engineering to deliver high-quality solutions that meet or exceed customer expectations. Responsibilities - Develop and maintain UVM-based verification environments for complex digital designs. - Create comprehensive verification plans and test cases based on design specifications. - Implement and execute test benches to verify functionality, performance, and compliance with specifications. - Debug issues and work closely … with design engineers to resolve them in a timely manner. - Drive continuous improvement of verification methodologies, processes, and best practices. - Mentor junior team members and provide technical guidance as needed. - Collaborate with other teams to ensure alignment of verification efforts with project timelines and goals. - Participate in design reviews and contribute to architectural decisions from a verificationMore ❯
to do what others think is impossible. Our employees are not only part of history, they're making history. Explore a career engineering what's possible as a Digital VerificationEngineer in San Diego, CA. What You'll Get to Do: Our Advanced Digital Engineering organization creates the next generation of communications and signal processing systems and will … platforms. We bring design to life in our San Diego labs and have on-site advanced manufacturing just minutes from the beach Southern California is famous. As a Digital VerificationEngineer at Northrop Grumman, you will have an opportunity to be a part of an organization that is collaborative, open, transparent, and team-oriented with a focus on … challenge the impossible and define possible? If you have hands-on experience in FPGA Development with VHDL, apply today. Roles and Responsibilities: Scope of responsibility also includes simulation and verification of FPGA/CPLD designs, requirements, and system validation Candidate is required to have knowledge of modern digital design and verification concepts Communicate effectively with members of cross More ❯
Location: Remote/Onsite (We are looking for candidates who are currently based in Europe and are open to working remotely.) Job Overview: We are seeking a proficient SoC VerificationEngineer with a strong background in ARM-based system designs and verification methodologies. The ideal candidate will be experienced in verifying complex SoC architectures, utilizing languages such … as C, System Verilog (SV), and Universal Verification Methodology (UVM). This role involves close collaboration with design teams to ensure that all aspects of the SoC are thoroughly validated, from architectural design to implementation. The candidate will also contribute to the development of verification plans, testbenches, and methodologies to enhance overall product quality. Key Responsibilities: Develop and … implement verification testbenches and components for ARM-based SoC designs. Execute thorough verification processes, including the development of test plans and test cases using C, SV, and UVM. Collaborate closely with design teams to understand and validate the various features of the SoC. Focus on stress testing, bug identification, and overall quality improvement of SoC IPs. Provide clear More ❯
world's leading technology companies, we drive innovation into all areas where computing is possible, helping to build better solutions for the billions of people using our technology worldwide. Verification engineers in the GPU Group play a critical role in developing next-generation GPU IP for graphics and compute. We are looking for passionate and skilled verification engineers … who are capable of taking ownership of verification environments for future-generation hardware IP. In this role, you will contribute to all phases of the verification flow, ensuring high-quality and on-time delivery. Required Skills and Experience: Exposure to all stages of unit verification, including collecting requirements, defining test methodologies, writing test plans, developing testbenches and … test cases, and driving verification closure. Strong hands-on experience in System Verilog and UVM methodology, with a solid background in Object-Oriented programming. Proven ability to debug complex designs and verification environments. Experience owning verification environments across multiple stages of verification, from investigation to closure. Ability to work with project management and technical leads on More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
from Arm and other vendors. These solutions target a wide range of market segments including mobile, server, IoT, automotive, and more. We are looking for creative and hard-working Verification Engineers to join the team. For this role you will have knowledge of verifying and testing the latest Arm's CPU cluster and related IPs You will ensure all … are also encouraged to mentor junior members Required Skills and Experience : Tried understanding of digital hardware design and Verilog/Systemverilog HDL Experienced in one or more of various verification methodologies - UVM/OVM, formal, power aware verification, emulation Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation More ❯
Staff GPU VerificationEngineer UK - Hybrid - Bristol, Cambridge or Kings Langley Up to £90,000 + Annual Bonus Permanent Are you committed to developing cutting-edge devices, and building your own expertise in verification? With this role, you get a unique opportunity to exercise hardware verification skills on innovative designs within an esteemed Hardware department. You … can apply your abilities to essential aspects that meet the most recent requirements and advancements, and be influential in bringing new verification methodologies to the table. Key skills required for this role: A solid experience in developing verification environments for RTL designs Knowledge of SystemVerilog & UVM An ability to develop new verification flows You will be involved … in the execution of all verification efforts of a component or sub-system, from the planning stage to sign-off. This will include creating verification plans, and development/maintenance of testbench components. Interested? Apply Now! 5V Tech are acting as an Employment Agency for the purposes of this job vacancy. We offer a reward scheme if you More ❯
As part of our ongoing expansion, Chiplogic need to strengthen our verification team in the UK. We are looking for bright candidates who have an enthusiasm and aptitude for working in our customer and inhouse projects. With 5-10 years' experience in industry you will relish the opportunity of working on a diverse range of projects that will both … challenge and develop your technical and verification skills. You will have a good understanding of different methodologies, particularly SystemVerilog, UVM and MS-UCM. You will have the ability to quickly assimilate the verification challenge and help define an effective (and pragmatic) verification strategy and gain the support of the end-customer for the chosen approach. You understand … the importance of monitoring key metrics to assess progress and predict the end-point for the verification process. As you rapidly build your verification skills through engagement on a broad range of projects you will have the opportunity to take on the role of verification lead, with responsibility for architecting the test environment and driving the other More ❯
shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a … highly motivated seniorengineer with a passion for Digital Design Verification. With an in-depth understanding of verification flows, test plans, and strategies, you thrive on ensuring that designs comply with protocol standards and system requirements. You are experienced in creating and examining functional coverage, writing SystemVerilog assertions, and debugging RTL and gate-level simulation failures. Your … design or EDA company. With a degree in Computer Engineering or Electrical Engineering, you are ready to take on this significant individual contributor role and potentially grow into a Verification Lead position. What You'll Be Doing: Collaborating with customers to confirm that designs comply with protocol standards and system requirements before they are developed into chips. Exhaustively verifying More ❯
Position: GPU Formal VerificationEngineer Contract: Permanent Salary: Negotiable + 20% variable The role: The role is for our fast-growing GPU Hardware team. Our mission is to create through constant innovation the best-in-class GPU IP, for a wide range of market segments and applications. By joining our team, you will have the opportunity to exercise … on key building blocks for market-leading chips and deliver significant impact to the future success of our wider team. You will: Be responsible for the delivery of formal verification activities related to a GPU component or sub-system from early stages of verification planning to sign-off. Design and implement formal verification strategies to achieve our … design quality goals. Root-cause design issues in collaboration with other engineers. Research new formal verification techniques and continuously drive the scope of what can be achieved with formal verification. Create verification plans, develop and maintain formal methodology and complex benches. Track and report verification metrics and closure. Participate in all stages of design specification definition providing More ❯
Sheffield, Yorkshire, United Kingdom Hybrid / WFH Options
Arm Limited
Job Overview This position is an excellent opportunity for an experienced and highly motivated VerificationEngineer to join the hardworking System IP team! This is a fast-paced technical role employing the latest hardware design and verification methodologies to develop complex and highly configurable hardware IP that sit at the heart of Arm-based Systems! About System … that provides critical and complex functionalities that complement systems design with Arm processors and Multimedia IP. What will I be accountable for? You will specify and develop new hardware verification testbenches for future generation hardware IP. You will improve existing testbenches to increase performance, quality and efficiency. You will also identify areas for improvement in processes and methodologies, then … implement those changes to advance our best-practises and state of the art for hardware verification. The responsibilities of a member of the Verification team are: Reviewing and assessing proposed design changes from a verification complexity point of view Develop and own verification plans for IP blocks based on architecture and design specifications. Define testbenches, coverage goals More ❯
DFT Technical Lead - Digital & SoC Design (CDI) Location: Paris, Caen, or Remote in France Salary: Up to €110,000 Gross per annum + company benefits Join an innovative global semiconductor specialist in high-performance mixed-signal and digital ASICs. They More ❯