1 to 25 of 60 Remote/Hybrid Permanent SystemVerilog Jobs

working on DO-254 development projects, particularly DAL A, DAL B or DAL C airborne electronic hardware. Experience of requirements-based FPGA verification using SystemVerilog, UVM or a similar structured verification methodology. Experience defining FPGA verification strategies, test plans, coverage objectives and verification evidence. Experience using linting tools and applying ...

## FPGA Design EngineersApplylocations: GB - Luton - Cap. Green 300: GB - Bristol - Coldharbour Lanetime type: Full timeposted on: Posted Todayjob requisition id: R0024187**Job Description:****Salary Ranges**Engineer: £38k - £53kSenior: £45k - £61kPrincipal: £54k - £71kLead: £60k - £84kLeonardo ...

## FPGA Design EngineersApplylocations: GB - Luton - Cap. Green 300: GB - Bristol - Coldharbour Lanetime type: Full timeposted on: Posted Todayjob requisition id: R0024187**Job Description:****Salary Ranges**Engineer: £38k - £53kSenior: £45k - £61kPrincipal: £54k - £71kLead: £60k - £84kLeonardo ...

development stage): Hardware requirements, capture and management Concept development for complex functions and systems FPGA design, implementation, and analysis Applying verification techniques usingVHDL or SystemVerilog, with exposure toUVMwhere applicable Production of material for design reviews Development of test planning, integration, and design verification activities Ensuring all firmware designs comply with ...

development stage): Hardware requirements, capture and management Concept development for complex functions and systems FPGA design, implementation, and analysis Applying verification techniques usingVHDL or SystemVerilog, with exposure toUVMwhere applicable Production of material for design reviews Development of test planning, integration, and design verification activities Ensuring all firmware designs comply with ...

Job Description: Your impactWould you like to deliver the complex Firmware that forms part of our self-protection systems installed on fast jet, UAV, land and naval platforms? Do you have experience leading Firmware teams ...

FPGA-based signal processing techniques including DDC/DUC, DDS, and FIR/IIR filters, as well as strong experience in FPGA verification and SystemVerilog development. We're looking for someone who is fluent in modelling and simulation using Python and/or MATLAB/Simulink, with practical experience ...

Job Description: Your impact Would you like to deliver the complexFirmware that forms part of our self-protection systems installed on fast jet, UAV, land and naval platforms? Do you have experience leadingFirmwareteams or delivering ...

Collaborate with multidisciplinary teams to deliver next-generation quantum technologies. What We’re Looking For: Strong experience in FPGA programming (VHDL/Verilog/SystemVerilog) and DSP implementation. Knowledge of digital and RF hardware, with hands-on experience in embedded systems. Experience with standard hardware interfaces (I2C, SPI, UART ...

Experience of auto‐generated code using model‐driven engineering with MATLAB and Simulink tools. Experience of design tools such as Verilog, SystemVerilog and UVM. Experience within the defence industry. What we need from you: Personal attributes and values are as important to us as technical ability. We are looking ...

Linux and/or Windows development environments . Bonus Experience Xilinx SoC platforms (e.g. Zynq, Versal) Intel (Altera) FPGA architectures, including SoCs Verilog/SystemVerilog Cryptographic algorithms or secure hardware systems Product compliance, certification, or regulated environments Personal Attributes Demonstrates ownership and accountability for technical delivery. Applies a structured approach ...

Depending on your experience, youll bring some, or all, of the following: Experience in design techniques using VHDL Experience in verification techniques using eitherVHDLor SystemVerilog/UVM. Experience in specifying timing and area constraints forefficientFPGA place and route. Ability toanalysesystem level requirements and derive detailedfirmwarerequirements. Degree (BSc, BEng, MEng ...

Linux and/or Windows development environments. Bonus Experience: Xilinx SoC platforms (e.g. Zynq, Versal) Intel (Altera) FPGA architectures, including SoCs Verilog/SystemVerilog Cryptographic algorithms or secure hardware systems Product compliance, certification, or regulated environments Personal Attributes: Demonstrates ownership and accountability for technical delivery. Applies a structured approach ...

flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge & Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources ...

flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge & Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources ...

engineers. Qualifications, Experience & Commitments Degree in electronic engineering or a related discipline, with around 10 years or more of FPGA development. Strong VHDL or SystemVerilog, with fluency in the main FPGA vendor toolchains. Delivered video or imaging pipelines in hardware, including common camera and serial sensor interfaces. Experience of designs ...

juniors and shaping FPGA delivery across UK sites. The role requires a degree in Electrical & Electronic Engineering or equivalent, strong FPGA experience (Verilog/SystemVerilog, VHDL), and eligibility for UK SC security clearance. Hybrid working is available in supported locations. #J-18808-Ljbffr ...

mixed signal design 1+ years experience in a people management or technical leadership role Hands‐on experience in digital IC design using Verilog, SystemVerilog, and/or VHDL Desirable experience: Mixed signal design exposure Familiarity with the full ASIC front‐end and back‐end flow Python scripting Experience using tools ...

documentation detailing DSP algorithm interactions with SerDes hardware and software components PREFERRED EXPERIENCE: Strong backgroundand experiencein digital design techniquesincluding clock domain crossing, RTL (preferably SystemVerilog), and ASIC front-end design tools and flows Understanding of power analysis and power reduction techniques for optimization of digital circuitry Experience in DSP algorithm ...

solver. Preferred Skills and Qualifications: Scripting experience with Python, sh/csh, TCL, MakeObject orientated programming (OOP) - Use of OOP design patternsKnowledge of SVA (SystemVerilog Assertions)Metric driven verification - verification planning, requirements extraction - Directed and constrained random verificationFunctional and code coverage analysisPower aware verification (using CPF/UPF)Testbench design ...

systems. You will shape architectures, guide FPGA design, and collaborate with hardware and software teams across UK sites. The role demands strong VHDL/SystemVerilog/Verilog, experience with FPGA SoCs (Versal), and a track record in demanding, mission-critical environments. #J-18808-Ljbffr ...

space and high reliability, and drive architecture and design across Microchip FPGAs for space missions. The role requires deep FPGA expertise, VHDL and SystemVerilog proficiency, and experience with industry tools; leadership on complex projects is preferred. Hybrid work options apply in the UK. #J-18808-Ljbffr ...

technical mentorship and support to less experienced engineers. Required Skills and Experience5+ years of experience in IP, subsystem, or SoC verification. Strong proficiency in SystemVerilog and Verilog. Experience with UVM or other industry-standard verification methodologies. Experience developing constrained-random verification environments and reusable verification components. Experience developing verification strategies ...

like side‐channel or fault attacks. Excellent collaboration, communication, and documentation skills. Nice To Have: Familiarity with hardware design flows (e.g., RTL, UVM/SystemVerilog). Exposure to TPMs, Secure Elements, or hardware‐backed crypto modules. Background in academic research or industry work in embedded security, firmware, or cryptographic implementation. ...

complex SoC developmentExperience in static design checks, including CDC, RDC, X-prop, Lint and UPF static checksExperience creating design specificationsExperience with Verilog/SystemVerilog and verification methodologiesStrong delivery record of sophisticated RTL subsystems in reasonable timescalesAbility to navigate and make high-level analysis driven PPA trade-offs along with driving ...