Reading, Berkshire, South East, United Kingdom Hybrid / WFH Options
Fortis Recruitment Solutions
FPGA implementation Experience with ASIC flows or FPGA-ASIC migration Familiarity with standards/quality in the aerospace/space domain (e.g. radiation mitigation, reliability) Experience with scripting (Python, Tcl, Bash, etc.) for automation and flow integration Knowledge of formal verification, constraint generation, or static analysis tools Experience working in remote/hybrid settings, distributed teams What We Offer Competitive More ❯
a multidisciplinary team to solve complex problems. Stay updated with the latest FPGA technologies and design tools. Required Skills & Qualifications: Extensive experience with VHDL for FPGA development. Proficient with TCL scripting and Modelsim/Questasim. Familiarity with current FPGA and SoC technologies, including Quartus tool chain. Degree or postgraduate degree in a relevant STEM subject. Ability to produce high-quality More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
ECM Selection (Holdings) Limited
analyses) or similar. Additional experience with radio frequency systems, DSP, embedded software and/or requirements management using DOORS would be beneficial. Further experience with C++, VHDL, Python and Tcl would be desirable. Due to the nature of projects, the role is mostly onsite, although occasional home working is possible when projects allow. In return, on offer is a competitive More ❯
of data structures, algorithms and databases Demonstrated proficiency in modern C++, debugging, and general software development skills Nice to have: Scripting language skills in one of: Lisp, Skill, Python, TCL Interest in digital or analog circuit design Experience with GUI frameworks, such as Qt, MFC (Windows) Familiarity with development on Linux/Unix or Windows Exposure to build and version More ❯
Southampton, Hampshire, South East, United Kingdom Hybrid / WFH Options
Fortis Recruitment Solutions
e.g. error correction, equalisation, beamforming, channel estimation) Familiarity with AMBA bus protocols Practical experience with UVM verification methodologies C++/SystemC experience for modelling and integration Scripting skills (Python, Tcl, Bash) for automation and flows Understanding of project methodologies (agile, waterfall, requirements traceability) Experience with AMD/Xilinx FPGAs and/or ASIC backend EDA flows What We Offer Competitive More ❯
Experience with FPGA toolchains (e.g., Xilinx Vivado, Intel Quartus, Lattice Diamond). Strong understanding of digital design principles, timing closure, and hardware debugging. Familiarity with scripting languages (e.g., Python, Tcl, Bash) for automation. Experience with simulation tools (ModelSim, QuestaSim, etc.). Preferred Qualifications: Experience with high-speed interfaces (e.g., SERDES, JESD204, AXI). Knowledge of embedded systems and SoC platforms More ❯
Oxford, England, United Kingdom Hybrid / WFH Options
IC Resources
and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred) What More ❯
banbury, south east england, united kingdom Hybrid / WFH Options
IC Resources
and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred) What More ❯
and attention to detail. Ability to work effectively within multidisciplinary teams and liaise directly with clients. Desirable: Familiarity with version control systems (e.g., Git, SVN). Scripting experience in TCL or Python for tool automation. Additional Information: Due to the sensitive nature of the work, successful candidates must be eligible for UK Security Clearance. Pre-employment screening will be required. More ❯
experience 8+ years of EDA tool development in the verification field Hands on experience with ASIC design and verification Good with C++ and other programming languages like Python, Perl, TCL, etc. Good understanding of computer algorithms. Ways to stand out from the crowd: Good understanding of Design for Testing including Scan/ATPG/JTAG. Strong English communication. NVIDIA is More ❯
firmware or driver development (C/C++) to aid in co-simulation or system-level testing. Experience in applying advanced verification techniques like formal verification or emulation. Familiarity with TCL/Perl for utility scripting alongside Python. Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. About US Tech Solutions: US Tech Solutions More ❯
gate-level simulation, static timing analysis (STA), and power-aware synthesis. Strong post-silicon debug and validation skills, including production bring-up and failure analysis. Proficiency in scripting languages (Tcl, Perl, Python) for automation and flow optimization. Strong problem-solving, debugging, and collaboration skills in a fast-paced environment. Pay for this position is based on market location and may More ❯
Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces s... More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
london (city of london), south east england, united kingdom
IC Resources
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Desirable Experience Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design More ❯
nodes is strongly preferred. Knowledge of high performance and low power implementation methods is preferred. Willing to push PPA to the best possible extent. Strong fundamentals. Expertise in Perl, TCLlanguage Equal Opportunities: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that More ❯
design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯
design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯
design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯
power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. Experience with microarchitecture exploration, performance modelling, and power optimisation techniques. Scripting ability in Python or TCL to automate design and analysis workflows. This is a superb opportunity to shape next-generation AI hardware from the ground up, working with a passionate team that values innovation, technical More ❯
power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. Experience with microarchitecture exploration, performance modelling, and power optimisation techniques. Scripting ability in Python or TCL to automate design and analysis workflows. This is a superb opportunity to shape next-generation AI hardware from the ground up, working with a passionate team that values innovation, technical More ❯