1 to 25 of 44 Permanent Tcl Jobs

channel attacks High performance CPU architecture and design. Modern SoC design methodologies and architecture Tools/Technologies Verilog, SystemVerilog, Perl Shell scripting, Python, Sage, Tcl C, C++ MATLAB, Xilinx Vivado Unix, Linux Front-end ASIC design tools - synopsys/cadence/mentorExcellent salary, bonus, stocks/shares, visa sponsorship and more »

Perl scripts Ability to work with technical writers in the production of technical documentation. Tools/Technologies Verilog, SystemVerilog, Perl Shell scripting, Python, Sage, Tcl C, C++ MATLAB, Xilinx Vivado Unix, Linux Front-end ASIC design tools - synopsys/cadence/mentor Excellent salary, bonus, stocks/shares, visa sponsorship more »

and structured approach to problem-solving. RTL skills in Verilog or VHDL Use of a UNIX environment and shell programming/scripting in e.g. Tcl, Perl, Python etc Programming languages such as: assembly language, higher-level (e.g. C), object orientated (e.g. C++ more »

and structured approach to problem-solving. RTL skills in Verilog or VHDL. Use of a UNIX environment and shell programming/scripting in e.g. Tcl, Perl, Python etc. Programming languages such as: assembly language, higher-level (e.g. C), object orientated (e.g. C++). If this role is of any interest more »

of UVM, SVA, VIP, and UPF for digital IC design verification Familiar with Linux OS, revision control like Git and scripting languages like Bash, Tcl, and Python Desirable Skills and Experience Experience with unit test frameworks like pytest, build scripting, Jenkins CI/CD automation Familiar with Xilinx FPGA development more »

of UVM, SVA, VIP, and UPF for digital IC design verification Familiar with Linux OS, revision control like Git and scripting languages like Bash, Tcl, and Python Desirable Skills and Experience Experience with unit test frameworks like pytest, build scripting, Jenkins CI/CD automation Familiar with Xilinx FPGA development more »

design flow - RTL-GDS2 Understanding of UVM and system verilog verification processes embedded hardware, systems, firmware coding/scripting in python, C++, system C, TcL, bash, perl, Rust etc. more »

x86 etc. PCIe/UCIe/CXL memory/DDR/cache coherency coding in C++/python/C/system C/TcL/java/bash/perl Please note, visa sponsorship is NOT available. more »

and structured approach to problem-solving. RTL skills in Verilog or VHDL Use of a UNIX environment and shell programming/scripting in e.g. Tcl, Perl, Python etc Programming languages such as: assembly language (ideally Arm assembler), higher-level (e.g. C), object oriented (e.g. C++) Visa sponsorship can be facilitated more »

knowledge of on-chip bus protocol (AMBA AHB, APB, AXI-Stream, etc). Experience with Linux OS, revision control (Git) and scripting languages (Bash, Tcl, and Python). Experience with EDA tools for simulation (Siemens Quest), Synthesis (DesignCompiler). Salary and Benefits: Up to £100K salary DOE. Travel opportunities. Private more »

logic libraries and manufacturing process Good knowledge of VHDL or Verilog or System-Verilog language Basic knowledge of programming and scripting languages like C++, TCL, bash, Perl Good experience of translating design requirements into RTL description Experience of digital or mixed-signal verification activities, testbench and verification planning, regression tests more »

in VHDL (or Verilog), CAD flows and tools specific to ASICs (modeling, design, simulation, synthesis, verification, etc.) Knowledge of C/C++ Scripting languages - Tcl, Perl, Python Optimization of architectures and microarchitectures at the HW/RTL levelAlthough not essential any experience in Front-End design for ASIC in the more »

of hands-on experience in digital IC verification You have solid knowledge of a digital hardware description languages (VHDL or Verilog) and scripting languages (TCL, Perl, Python) You have solid knowledge of System Verilog and UVM methodology & processes Experience in formal verification & gate-level simulations are a plus A previous more »

of experience in digital ASIC design Excellent programming skills in hardware description languages (e.g. SystemVerilog) Good programming skills in scripting languages (e.g. Python, Perl, Tcl) Expertise in verification methodologies & tools (e.g. UVM) would be a plus Excellent written and verbal communication skills in EnglishFor more information and to apply, please more »

and UVM test benches Creation of UVM test benches System Verilog assertions Managing regression and debugging failures Scripting languages (e.g. Perl/Python/TCL) As this is a Senior role, team leadership skills will be welcomed and there could be an opportunity to take on more of a ‘lead more »

and UVM test benches Creation of UVM test benches System Verilog assertions Managing regression and debugging failures Scripting languages (e.g. Perl/Python/TCL) As this is a Senior role, team leadership skills will be welcomed and there could be an opportunity to take on more of a ‘lead more »

Preferred Qualifications: Experience with Autodesk VRED and Dassault Catia V5 scripting. Familiarity with additional programming languages and tools such as Tk (for GUIs), Perl, Tcl, JavaScript, Fortran, C, VBasic, HTML, XML, DOS commands, PowerShell, and Linux Bash Script. Knowledge of software licensing administration, including LM-X and FlexLM. Why work more »

architectures from concept; Familiarity with CAD/EDA tools for Design and Simulation; Working knowledge in scripting languages for verification environments (e.g Python, Perl, TCL would be preferred); Strong background in Digital Logic Design and VerificationAs a top company you can expect ongoing training and support, flexible working conditions, sabbaticals more »

architectures from concept; Familiarity with CAD/EDA tools for Design and Simulation; Working knowledge in scripting languages for verification environments (e.g Python, Perl, TCL would be preferred); Strong background in Digital Logic Design and Verification;As a top company you can expect ongoing training and support, flexible working conditions more »

to develop FPGA firmware for new product Software languages, C (or C++) is preferable, additional languages considered) Knowledge of one or more of Bash, TCL, or Python. Expertise in Digital Signal Processing (DSP) Work on product developments to optimize and add new functionalities Support the Embedded Software team and the more »

and ability to travel to customer sites. Preferred Requirements Diverse use of CAE tools across multiple disciplines is a plus. Experience with programming languages (TCL/Python or similar). FEA-based optimisation techniques applied to composite and metallic structures. Experience working in a software company in a Pre-sales more »

techniques Strong knowledge of FPGA tool flows (synthesis, partitioning, place&route, timing analysis) Excellent skills in SystemVerilog/Verilog/VHDL Experience in scripting (tcl preferable) and Python programming Experience using Questa, ModelSim, GHDL, Verilator, cocotb Experience using Quartus/Vivado/Vitis Experience in High Level Synthesis (HLS) Experience more »

and diverse team, and developing the environment. Must-have experience: Circa 5+ years' experience in FPGA development VHDL/SystemVerilog RTL design/coding Tcl/Python or similar coding/scripting (Nice-to-have experience): UVM verification embedded software/firmware DevOps/software automation/CI/CD more »

methodologies & tools Strong knowledge of UVM Excellent programming skills in hardware description languages (e.g. SystemVerilog) Good programming skills in scripting languages (e.g. Python, Perl, Tcl) Excellent written and verbal communication skills in English For more information and to apply, please contact Lucy Edmondson. more »

Background Requirements: Knowledge/experience with HDL (SystemVerilog/Verilog/VHDL), particularly for testbenches creation Knowledge/experience in scripting languages, such as Tcl and Python Some knowledge of ASIC design flow and related verification step Nice to have: Some experience in digital RTL design Knowledge of UVM environments more »