Experience defining and implementing test strategies for high-volume production Proficiency in RTL and testbench development using SystemVerilog and Verilog Strong scripting skills (Shell, Tcl, Python3) Experience with Tessent and SSN methods integrated with EDA design flows is a plus Excellent leadership and communication skills Reporting structure: Reports to: Physical More ❯
work rotating 12-hour shifts and provide on-call support (1 week every 6-10 weeks) • Technical skills: o Familiarity with Linux and scripting (TCL/TK or PERL) o Proficiency in Microsoft Office • Strong communication, presentation, and coordination skills • Experience working in a multi-contractor, badge-less team environment More ❯
flow experience for FPGA Comfortable attacking new and unfamiliar problems Interest in trading Things we would like to see but are not essential: Python, TCL Low latency design ASIC Network and packet processing Trading systems WHAT WE OFFER Competitive compensation Annual discretionary bonus Fully catered breakfast, lunch and snacks. More ❯
/GPU/CPU/SoC knowledge Experience in wider verification technologies, such formal property based verification and code mutation Skill scripting in Python, TCL, Perl, SystemC, C++ experience Understanding of functional safety standards such as ISO26262 Who we are Imagination is a UK-based company that creates silicon and More ❯
Luton, Bedfordshire, United Kingdom Hybrid / WFH Options
Leonardo UK Ltd
teams What we need from you What you really must have: Experience leading teams or managing packages of work. Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet More ❯
such as Cadence, Mentor, and Synopsys , covering the entire front-end digital design and verification flow. You are proficient in scripting languages such as Tcl, Shell, Perl, or Python, which you use to automate tasks and streamline your workflow. You are comfortable working in both Linux and Windows environments . More ❯
power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯
power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯
power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯
power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯
power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯
Puppet, Chef, SMS, Satellite, etc. Knowledge of interpreted and compiled computer programming languages such as Python, Java, C, Objective C, C++, C Sharp, SQL, Tcl, Perl, PHP. Assembly, CUDA, and GPU language experience desirable. Knowledge of advanced computing technologies such as parallel processing, in-memory databases, graph databases and graph More ❯
languages, particularly writing and debugging Linux/Unix Bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, Elisa, TCL, VBA would be useful but not essential Spacecraft electrical and harness knowledge would be an advantage but not essential Competent in the use of various More ❯
consistency, memory coherency, security architectures. Strong software engineering skills with proven ability in automation and proficiency in at least one programming language (C++, Python, TCL etc.). Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work More ❯
facilities to deliver Firmware for complex digital systems that meet challenging future customer requirements. What you really must have: Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7, Xilinx UltraScale, Intel (Altera), or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet More ❯
systems. Strong understanding of RF fundamentals, signal processing and efficient power supplies Knowledge ofEMC implications of hard speed transmission Scripting and automation, such as TCL and Python. Knowledge of thermal and mechanical considerations in hardware design. A humble attitude and good communication skills. Ability to create an understanding of complex More ❯
a Design for Test (DFT) Engineer: Proven Expertise in DFT engineering, with a strong record of technical innovation. Technical Proficiency : Skilled in SystemVerilog RTL, TCL, Python, and Unix/Linux environments. Core DFT Competencies : Experience with hierarchical scan, memory BIST, JTAG/IJTAG, at-speed testing, ATPG, fault simulation, and More ❯
digital IF equipment. 3. Produce HDL code for VITA-49 or similar network SDR transport protocols. 4. Expert user of Linux. 5. Scripting in TCL designs utilizing IP Cores for rapid development. 6. Build scripting to support continuous integration. 7. Design and development of test benches to prove Verilog code. More ❯
Synplify Pro, and knowledge of safety standards such as IEC 61513, IEC 62566, IEC 26262, DO-254, as well as languages like VHDL, SystemVerilog, TCL, Python. The package includes a competitive salary (dependent on experience), pension, life assurance, 25 days' holiday plus bank holidays, and opportunities for training and career More ❯
system requirements and specifications. Configure and optimize system tools and applications, to include job schedulers (Slurm and PBSPro) and system resources (GitLab, LUA/TCL modules, and system support applications). Create and brief technical presentations to technical and non-technical stakeholders. Maintain detailed documentation of system configurations, procedures, and More ❯
in system and behavioral modelling Experience designing for different CMOS processes and aggressive geometry nodes. Understanding of reliability concerns Understanding of scripting languages such Tcl, Perl, Python etc. This role is based in our Newbury office, UK. This is a hybrid position and will follow a 2+ day in-office More ❯
expertise with industry-standard EDA tools (Cadence, Synopsys) Experience with multi-power domain and low-power digital design techniques Strong skills in scripting (e.g., TCL, Python, PERL, Make) for automation Familiarity with advanced CMOS technologies, ideally from 180nm to 28nm and below Track record of successful tapeouts and mass production More ❯
CAD . Experience in designing systems involving IOMT Internet of Military Things . Proven expert on Programming in languages such as Python, Shell, Perl, TCL . Chartered Engineer CEng status. Member of a Professional designated body e.g. IET, InstMC . Proven experience in aerospace or telecommunications satellite design and manufacturing. More ❯
is required in order to obtain and maintain security clearance Preferred Qualifications Principal and Senior Principal: Experience with scripting languages for Verification automation (Perl, TCL, Bash, and Makefile) Knowledge of Computer Architectures and Digital design (Memories, bus standards, microprocessors) Experience with functional verification methodology for the full life cycle of More ❯
Knowledge and experience of safety standards such as IEC 61513, IEC 62566, IEC26262, DO 254 UVM Constrained Random Testing Formal Verification Languages: VHDL, SystemVerilog, TCL, Python We're an equal opportunities employer. We're committed to developing a diverse workforce and an inclusive working environment. We believe that people from More ❯