Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
in Python and TCL would be advantageous. Detailed knowledge of the FPGA design flow from RTL design, simulation, synthesis, place & route, constraints, and timing closure Strong RTL skills in Verilog/System Verilog or VHDL with source code under version control. Scripting skills in Python basic level C/C++. Knowledge and expertise in debugging designs in both simulation and More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
dedicated FPGA prototyping platform. Debugging of test failures and issues by working in collaboration with the design teams and FPGA users. Required Skills and Experience: Strong RTL skills in Verilog/System Verilog with source code under version control. Understanding of Arm based systems, including SoC system architecture and AMBA protocols. Experience of working with high speed I/O More ❯
Luton, Bedfordshire, United Kingdom Hybrid / WFH Options
Leonardo UK Ltd
FPGA/Firmware delivery teams What we need from you What you really must have: Experience leading teams or managing packages of work. Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Ecm Selection
UK office. Your CV will show your: Good degree in electronics or another technical subject from a top university Extensive experience developing complex and well-structured RTL in SystemVerilog, Verilog or VHDL, with particular attention to design approach and performance constraints And as a skilled FPGA Design Engineer you will also have, as your CV demonstrates: A strong understanding of More ❯
will be responsible for: - Hardware requirements capture and management. - Concept development for complex functions and systems. - FPGA design and analysis. - Experience in verification techniques using either VHDL or System Verilog/UVM. - Production of material for design reviews. - Development of test planning, integration and design verification. - Ensure that all firmware designs follow the company firmware process. - Experience using FPGA technologies More ❯
Master's degree in Electronic Engineering or related field - 12+ years of digital ASIC verification experience - Practical experience and understanding of: - Requirement capture, verification planning and coverage closure - System Verilog and UVM test benches - Creation of UVM test benches - System Verilog assertions - Managing regression and debugging failures - Scripting languages (e.g. Perl/Python/TCL) - Team player with good oral More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Arm Limited
and experience: Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. More ❯
Lexington, Massachusetts, United States Hybrid / WFH Options
John Galt Staffing
in FPGA's Architecting and allocating an embedded system between FW and SW Xilinx embedded systems development (PL, PS, SDK, ARM, Microblaze) Xilinx RFSoC/MPSoC development VHDL/Verilog FPGA development Bring up and debug of FPGA based HW and FW Matlab/C/C++ Masters Degree Work from Home: This position will be approximately 40% onsite. More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
Agile Analog Ltd
digital design, verification, and synthesis, while targeting advanced semiconductor technologies down to 2nm process nodes. What we need from you: Design & Modelling Proficient in modeling digital systems using VHDL, Verilog, and SystemVerilog Strong foundation in combinational and sequential logic , including FSMs, pipelines, and datapaths Skilled in Register-Transfer Level (RTL) design with a focus on modular, reusable, and synthesizable components More ❯
based firmware development lifecycle to deliver customer requirements by: Developing high-level firmware requirements using DOORS Creating architectural designs Defining low level requirements and detailed designs Writing VHDL and Verilog HDL code using Sigasi Studio Simulating HDL designs at unit, integration and system level using Mentor Graphics QuestaSIM Undertaking synthesis, place and route and static timing analysis using Synopsis Synplify More ❯
