2 of 2 ASIC Engineer Jobs in Bristol

ASIC Design Engineer – Wi-Fi Products Location: Bristol Type: Permanent/Full-Time Salary: Competitive + Bonus + Benefits Industry: Semiconductors/Wireless Technology About the Company Join a world-leading technology company at the forefront of wireless innovation. As an ASIC Engineer, you will work on designs and deliver cutting-edge Wi-Fi chipsets and … globe, you’ll be working in a collaborative environment where innovation, technical excellence, and personal development are genuinely valued. The Role I am seeking a highly skilled and motivated ASIC Engineer to join the Wi-Fi development team. In this role, you’ll contribute to the design and development of next-generation Wi-Fi SoCs, with a focus … support post-silicon bring-up/debug if required Requirements Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field 5+ years of hands-on ASIC design experience Strong RTL design skills using Verilog or SystemVerilog Experience in SoC development and integration Familiarity with Wi-Fi, wireless MAC/PHY, or DSP-based systems is More ❯

Principal Digital Design Engineer Bristol – Cambridge, Oxford can also be considered Salary range - £80k to £100k depending on experience + RSUs + bonus Due to growth, I am looking for a Principal Digital Design Engineer with several years’ experience in industry working on ASIC developments and IP design, with at least one successful project as Technical Lead … on-chip microarchitecture, and RTL design of both individual blocks and integration layers. You will be responsible for full-flow ownership from digital specification through to RTL for complex ASIC blocks or full-chip designs. Experience Extensive experience in integrated circuit development with a strong understanding of all stages of ASIC design, from specification to RTL, along with … a working knowledge of the RTL to tape-out process Proven expertise in ASIC microarchitecture, including interconnect design, CPU integration, DDR, PCIe, JESD204, and system-level considerations such as pinout, ballout, die size, and power consumption. Familiarity with system-on-chip interconnect protocols such as AMBA AHB, APB, and at least one variant of AXI, including AXI3, AXI4, AXI4 More ❯