Senior/Principal Silicon Verification Engineer
- Hiring Organisation
- Jobleads-UK
- Location
- Cambridge, England, United Kingdom
teams and programming languages to find root causes of deep and complex issues Experience of the verification process applied in CPU and/or ASIC environments System Verilog, Python, C++, Linux Desirable skills UVM SVA Assembly languages LLVM, GCC DVCS e.g. Git SGE or other DRMS XML and XPath/ ...