7 of 7 Cadence Jobs in Cambridge

experience using C/C++. Experience in electronic circuit design, schematic capture and PCB layout. Proficiency with PCB design software such as Altium Designer, Cadence or OrCAD. Motor drive/motor control experience is essential. Experience with brushless DC (BLDC) motors would be highly advantageous. Experience developing embedded control ...

version control (Git), build systems, and general DevOps/release-engineering practices. Familiarity with running workloads on hardware emulation platforms (e.g., Synopsys ZeBu, Cadence Palladium, or Siemens Veloce) as an execution target is a plus. Strong problem-solving and debug skills, with the ability to work both independently ...

z2bz0years of industrial IC/system design experience Strong expertise in low-power analog and mixed-signal (AMS) IC design Hands-on experience with Cadence Virtuoso, AMS sims, verilog and related analog design tools Proficiency with Spectre, HSPICE, and board-level simulation methodologies Solid understanding of PDKs ...

depending upon specialization. Solid understanding of the fundamentals of analogue/RF circuit design and fully competent in analogue design and verification using Cadence tools. Experience of taking a design from specification through to production is desirable. Familiarity of the system requirements on one or more of the following ...

drive and ability to work to a schedule. Familiarity with scripting languages (Bash, Python, Tcl, etc) The following would also be useful: Experience of Cadence simulation tool flow. Experience with ASIC/FPGA synthesis and implementation, DFT architecture and insertion, software development, and scripting. The role is based ...

designs for better physical QOR. Scripting skills both to drive tools and to analyse results. The following would also be useful: Experience of Cadence implementation tool flow. Experience of implementation complex designs. Advanced FinFET technologies. Good understanding of design/front-end processes. The role is based in Cambridge ...

also be useful SoC verification concepts: memory caches, DMA, security architecture (TrustZone or equivalent). Formal experience with Jasper or similar tools. Experience of Cadence simulation tool flow including gate-level simulation. Scripting languages: Bash, TCL, Make, YAML, etc. Location & Role Details The role is based in Cambridge with ...