1 to 8 of 8 Cadence Jobs in Cambridge

months. Responsibilities & Experience: Excellent ATPG/MBIST skills are required. Experience building a new flow from scratch. Must be familiar with Synopsys/Cadence/Mentor industry standard toolsets. Previous experience of EDA tool specification/procurement is nice to have Strong ATE bring up and production support skills. more »

to write coherent documentation. Desirable Experience: A broad knowledge of EDA tools for schematic entry PCB layout and signal integrity analysis. Experience in using Cadence CIS, Mentor PADs Layout, Allegro PCB design suite and Hyperlynx tools. Embedded software knowledge to test and debug the design with a creative and more »

team player with good interpersonal skills, and excellent communication skills, including verbal, written and communication, and presentation skills in English. Very good knowledge of Cadence tool workflow for schematic capture and layout XL. Very good knowledge in running tool for checking DRC, LVS, ERC and antenna rules and ability … good understanding of electromigration and how to layout a block with high reliability Appreciation and knowledge of parasitic associated with a layout. Knowledge of Cadence SKILL language and PCELL development. At Rakon, we value task-focused problem solvers and self-starters who continuously seek to improve our products and more »

/RF circuits in deep sub-micron technology as well as a strong analytical approach with a clear track record of success and delivery • Cadence Virtuoso Design Framework Experience • Ability to work and interact with engineering teams across multiple disciplines during ASIC project stream development • Great communication skills and … RF PA • Understanding of Radio systems, gain and noise budgeting, phase noise and intermodulation mechanisms • Experience on ESD design and strategy overview • Experience on Cadence/Calibre verification tools • Experience on revision control tools more »

following areas would enhance the application: • A broad knowledge of EDA tools for schematic entry PCB layout and signal integrity analysis • Experience in using Cadence CIS, Mentor PADs Layout, Allegro PCB design suite and Hyperlynx tools • Embedded software knowledge to test and debug the design with a creative and more »

offered with this role. Required skills for the Principal Semiconductor Packaging Engineer will include: Strong IC semiconductor packaging experience and knowledge Advanced packaging knowledge Cadence EDA tool experience SI/EMC analysis experience Strong communication skills and a start-up mentality Degree qualified Please contact Rachel Anderson for further more »

Key Requirements: Strong experience in architecting/implementing formal verification environments. Experience in SVA and PSL. Experience working with industry-leading formal tools. eg. Cadence, Jasper Gold, Siemens EDA QuestaFormal, or Synopsys. Keywords: Formal Verification/Semiconductor/Semi conductor/Semi-conductor/GPU/SystemVerilog/System … Verilog Assertions/Property Specification Language/Cadence/JasperGold/Siemens EDA/Synopsys If you are interested in this Formal Verification Engineer position, please send a CV to ts@eu-recruit.com By applying to this role you understand that we may collect your personal data and store more »

power electronics. Experience with complex board design from requirement collection through schematic, layout, manufacturing, and validation. Experienced in electronic design tools (Altium, Xpedition or Cadence) High speed digital design experience, USB3, MIPI Gigabit ethernet, DDRX memory. Understanding of Digital Communication/Signal Processing. Knowledge in EMC testing and its more »