1 of 1 Remote Physical Design Engineer Jobs in Cambridge

responsible for all stages from RTL to STA including logical equivalence checking (LEC) and conformal low power (CLP) checking. This will also include constraint and UPF development and debug. Physical implementation of Arm graphics processors using the entire implementation flow from RTL through place and route to STA. Supplying RTL feedback to designers via Jira to improve PPA and … ll need to succeed Cadence: Genus, Innovus, Tempus, QRC & Conformal PnR Flow: Synthesis, LEC, CLP, Floorplan, Placement, CTS, PostCTS, Routing, STA Synopsys: Fusion compiler, Formality Synthesis, LEC Low power design techniques (power gating, DVFS etc.) Understanding in building flows and methodologies using scripting languages such as TCL, Python, Perl to support project development. What you'll get in return More ❯