26 to 32 of 32 SystemVerilog Jobs in Cambridge

lead, plan, and execute verification tasks independently Skilled in debugging complex issues across software/hardware boundaries Proficient in: SystemVerilogPython, C++Linux environments Desirable Skills:UVM (Universal Verification Methodology)SVA (SystemVerilog Assertions) Assembly language familiarityExperience with toolchains such as LLVM or GCCDVCS tools (e.g., Git)Experience with job schedulers (SGE or similar DRMS)XML/XPath/XSLTWeb technologies: HTML/ More ❯

and planning skills Motivated, self-starting, and collaborative Ability to troubleshoot complex issues across teams and languages Experience with verification in CPU and/or ASIC environments Knowledge of SystemVerilog, Python, C++, Linux, UVM, SVA, Assembly, LLVM, GCC, Git, SGE or other DRS Familiarity with XML, XPath/XSLT We offer a competitive salary, flexible working, generous leave, private medical More ❯

minimizes bug escapes. Shown experience in block-level verification using UVM or similar methodologies. Strong knowledge of coverage driven verification for complex designs. Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches. Skilled in planning verification tasks and producing realistic effort and time estimates. Additional Qualities That Will Help Your Application Stand Out: Experience in working with More ❯

minimizes bug escapes. Shown experience in block-level verification using UVM or similar methodologies. Strong knowledge of coverage driven verification for complex designs. Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches. Skilled in planning verification tasks and producing realistic effort and time estimates. Additional Qualities That Will Help Your Application Stand Out: Experience in working with More ❯

minimizes bug escapes. Shown experience in block-level verification using UVM or similar methodologies. Strong knowledge of coverage driven verification for complex designs. Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches. Skilled in planning verification tasks and producing realistic effort and time estimates. Additional Qualities That Will Help Your Application Stand Out: Experience in working with More ❯

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building More ❯

JOB AD: Digital DesignerLocation: Cambridge or Bristol (3 days onsite, 2 remote)Contract Length: 12 monthsIR35 Status: Inside IR35 Start Date: ASAP A client of mine is looking for Digital Designer, for an initial 12-month contract basis. This role More ❯