3 of 3 Remote/Hybrid SystemVerilog Jobs in Cambridgeshire

adjust designs to ensure timing closure - Bring value with experience in Python based verification frameworks, such as cocotb (highly advantageous) Requirements: - Strong knowledge of SystemVerilog - Experience with Python - Proven background in RTL verification - Ability to write and validate timing constraints - Understanding of low power design principles - Experience writing module specifications ...

generous salary on offer. This award-winning Technology company seeks a well qualified FPGA Engineer with SoC design and Integration skills, RTL Verification experience (SystemVerilog, VHDL) and Python knowledge. In this role the successful FPGA Design Engineer will write timing constraints and where necessary modify designs to close timing; working … Electronic Engineering related discipline. Proven commercial FPGA Design experience. SoC design and Integration experience. Python knowledge ideally with exposure to cocotb. RTL Verification experience (SystemVerilog, VHDL). Writing timing constraints and ensuring these are met. Design for low power. To find out more, please apply in confidence now. You must ...

NoC Architect Baya Systems , Greater Cambridge, UK -or- elsewhere in the UK hybrid/remote Job Title: NoC Architect About the role: We are seeking a NoC Architect with prior research experience in Networks-on ...