8 of 8 FPGA Jobs in Central London

Field-Programmable Gate Arrays Engineer

Hiring Organisation
Gazelle Global
Location
City of London, London, United Kingdom
getting in touch because I’m supporting a client who are pushing the boundaries of high-performance IP on next generation FPGA and Adaptive SoC platforms and your experience looks highly relevant. They require someone with strong SystemVerilog RTL capability, confident across 100Gb Ethernet, PCIe Gen5 and AXI, and comfortable ...

Application Specific Integrated Circuit Design Engineer

Hiring Organisation
IC Resources
Location
City of London, London, United Kingdom
site visits. Key Responsibilities Design, develop, and verify digital hardware modules for high-security applications. Create robust designs suitable for both ASIC and FPGA implementations. Contribute to the full digital design lifecycle, from concept through to deployment. Develop hardware architectures supporting cryptographic functionality. Qualifications Bachelor’s or Master’s degree ...

Senior Low Latency C++ Engineer

Hiring Organisation
NJF Global Holdings Ltd
Location
City of London, London, United Kingdom
work on next-generation market-making and arbitrage strategies. The Role: You would be joining a high-P&L, cross-functional team (Traders, Quants, FPGA Engineers) to build execution logic and order management systems where nanoseconds determine profitability. Location & Flexibility: This team is operationally distributed across major hubs. ...

Senior FPGA Engineer

Hiring Organisation
Quant Capital
Location
City of London, London, United Kingdom
FPGA ENGINEER – ULTRA-LOW LATENCY SYSTEMS Location: London (Hybrid: 4 days onsite) Sector: Quant Trading/High-Performance Computing Quant Capital is partnering with a global trading firm building a greenfield FPGA team focused on low-latency, high-throughput hardware systems. This small, senior group will deliver high-speed compute … infrastructure integrated directly into trading, research, and networking pipelines. What You’ll Be Doing Designing and implementing latency-optimised FPGA systems in Verilog/SystemVerilog Developing high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipelining Using simulation and formal tools (Verilator, Cocotb, etc.) for validation Working across teams ...

FPGA Engineer - directly influence trading performance at a smaller HFT

Hiring Organisation
Saragossa
Location
City of London, London, United Kingdom
influence trading performance. Expect a hands-on, fast-paced environment where technical depth, innovation, and collaboration are key. You’ll architect, implement and deploy FPGA solutions across the business. They’re a global trading firm with offices in both the UK & US, the team is lean (~40 people globally), meaning … direct impact of your work – no red tape here! You’ll also enjoy a lot of autonomy, focusing on building new FPGA applications from the ground up – including RTL design, synthesis, and timing analysis whilst working closely with Traders and Developers to identify performance bottlenecks and create cutting-edge solutions. ...

Design Verification Engineer

Hiring Organisation
Platform Recruitment
Location
City of London, London, United Kingdom
most prestigious high-frequency trading companies in the world to find a verification engineer to help verify their complex low-latency FPGA systems. You'll be joining a team at the forefront of innovation in design verification, where you'll be supported in pushing the envelope alongside top pioneers … analytical capability, able to isolate and resolve complex RTL and testbench issues efficiently. At least two years of professional RTL functional verification experience for FPGA or ASIC designs. Hands-on expertise in SystemVerilog and UVM, including stimulus development and code/functional coverage collection and analysis. Proficiency in Python ...

C++ Engineer — Pushing the Speed of Light | Ultra-Low Latency Trading Systems

Hiring Organisation
Mondrian Alpha
Location
City of London, London, United Kingdom
contested ground and every cache miss is a bug. Location: London/New York/Chicago Environment: C++20/23 • Linux • Kernel-bypass Networking • FPGA • RDMA • Nanosecond Execution Their engineers operate where nanoseconds decide P&L — measured, profiled, and deployed in live markets where performance is the edge. They … handlers and SIMD-vectorized pricing logic in AVX-512 . Deliver next-tick telemetry with nanosecond-precision timestamps and cross-core synchronization. Collaborate with FPGA specialists to merge hardware precision with software agility. The Toolkit Modern C++20/23 , template metaprogramming, constexpr, inline assembly when necessary. Profiling and optimization using ...